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* MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_startChris Dearman2009-11-021-3/+4
| | | | | Signed-off-by: Chris Dearman (chris@mips.com) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operandsNigel Stephens2009-11-022-17/+7
| | | | | | | This patch ensures that the sign bit is always updated for NaN operands. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SPRAM: Clean up support code a littleChris Dearman2009-11-023-10/+12
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 1004K: Enable SPRAM support.Ralf Baechle2009-11-021-0/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4Ralf Baechle2009-11-021-0/+13
| | | | | | Based on original patch by Chris Dearman <chris@mips.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.Ralf Baechle2009-11-021-2/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTI: Fix accesses to device registers on MIPS boardsChris Dearman2009-11-021-1/+1
| | | | | | | | | This fixes the remaining problems introduced by f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length & byteswapping in bigendian mode) Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix machine check exception in kmap_coherent()Kevin Cernekee2009-11-022-3/+7
| | | | | | | | | | | | | | | | | | | | | | | On an SMP system with cache aliases, the following sequence of events may happen: 1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a temporary mapping in the fixmap region 2) copy_page() starts on CPU0 3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page() 4) CPU0 takes the interrupt, interrupting copy_page() 5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again 6) The second invocation of kmap_coherent() on CPU0 tries to use the same fixmap virtual address that was being used by copy_user_highpage() 7) CPU0 throws a machine check exception for the TLB address conflict Fixed by creating an extra set of fixmap entries for use in interrupt handlers. This prevents fixmap VA conflicts between copy_user_highpage() running in user context, and local_r4k_flush_cache_page() invoked from an SMP IPI. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.Ralf Baechle2009-11-021-2/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: register watchdog device only if enabled in hw configurationFlorian Fainelli2009-11-022-1/+11
| | | | | | | | | This patch checks if the watchdog enable bit is set in the DCL register meaning that the hardware watchdog actually works and if so, register the ar7_wdt platform_device. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Prepare for watchdog supportFlorian Fainelli2009-11-022-1/+38
| | | | | | | | This patch prepares the board code to register a bcm63xx_wdt platform_device that we are going to use in a subsequent patch. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Make bcm63xx_uart_register an initfuncFlorian Fainelli2009-11-023-10/+1
| | | | | | | | | This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c and make bcm63xx_uart_register an initfunc. Allows us to remove bcm63xx_dev_uart.h which was there to make checkpatch.pl happy. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AU1000: Fix build failure for db1x00 configured for Au1100 SoCFlorian Fainelli2009-11-021-0/+2
| | | | | | | | | | | | This patch fixes the following warning, which becomes an error due to -Werror to be turned on: CC arch/mips/alchemy/common/gpiolib-au1000.o cc1: warnings being treated as errors arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq': /home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix soft-reset lockup on BCM6345Florian Fainelli2009-11-021-1/+3
| | | | | | | | | | This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit will also lock the other blocks including UART. Instead of setting only the PLL soft reset bit in the software reset register, set this bit but do not touch the others. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TXx9: Fix error handling / Fix for noenexisting gpio_remove.Ralf Roesch2009-11-021-1/+2
| | | | | | | Error was introduced by commit 0385d1f3d394c6814be0b165c153fc3fc254469a. Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add IRQF_TIMER flag for timer interruptsWu Zhangjin2009-11-026-6/+6
| | | | | | | | | | | As the commit 3ee4c147 shows, we need to "Add IRQF_TIMER flag for timer interrupts", Atsushi Nemoto have reported that some other timer interrupts should be considered, Here it is. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 64-bit: Fix o32 lookup_dcookie syscallWu Zhangjin2009-11-022-1/+7
| | | | | | | | | | An o32 aplication passes a 64-bit value in a pair of registers; a 64-bit kernel expects a 64-bit argument in a single register. Signed-off-by: Chen Jie <chenj@lemote.com> Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Remove stray unlock_kernel.Ralf Baechle2009-11-021-2/+0
| | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Josip Rodin <joy@entuzijast.net>
* MIPS: Add IRQF_TIMER flag for timer interruptsWu Zhangjin2009-11-027-7/+7
| | | | | | | | | | Along the lines of d6c585a4342a2ff627a29f9aea77c5ed4cd76023, add IRQF_TIMER flag for all timer interrupts This ensures that timer interrupts won't be disabled on suspend and not threaded for PREEMPT_RT. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove redundant local_irq_disable()Wu Zhangjin2009-11-021-1/+0
| | | | | | | | That code is executed with irq disabled already, so, remove the redundant local_irq_disable() here. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Fix buildRalf Baechle2009-11-021-2/+2
| | | | | | Broken by 182a85f8a119c789610a9d464f4129ded9f3c107. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cleanup CONFIG_DEBUG_STACK_USAGE version of alloc_thread_info.Ralf Baechle2009-11-021-8/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/smp.cDavid Daney2009-11-021-2/+3
| | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't write ones to reserved entryhi bits.Ralf Baechle2009-11-021-5/+5
| | | | | | | | | | | | | | | | We've silently been relying on the hardware chopping off excess, reserved ASID bits for no better reason that it saving an instruction. Because we already have: #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) in <asm/mmu_context.h>. We can use a cleanup to avoid writing non-zero bits into the reserved entryhi bits. This avoid triggering some debugging assertion in the Cavium simulator. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Extend COMMAND_LINE_SIZERalf Baechle2009-11-021-1/+1
| | | | | | Some firmware may pass well over 256 bytes these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Avoid spurious make includecheck messageRalf Baechle2009-09-301-2/+2
| | | | | | | | arch/mips/include/asm/unaligned.h: linux/unaligned/generic.h is included more than once. Entirely legitimate but just noise. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Get rid of BKL.Ralf Baechle2009-09-302-42/+50
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Fix build after the credential changes a while ago.Ralf Baechle2009-09-301-10/+23
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Excite: Get rid of BKL.Ralf Baechle2009-09-301-2/+0
| | | | | | It's not obvious what good it was supposed to do here anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Get rid of BKL.Ralf Baechle2009-09-301-18/+15
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add PCMCIA & Cardbus support.Maxime Bizon2009-09-304-1/+162
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MSP71xx: request_irq() failure ignored in msp_pcibios_config_access()Roel Kluin2009-09-301-1/+4
| | | | | | | | | Produce an error if request_irq() fails. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: "Ithamar R. Adema" <ithamar.adema@team-embedded.nl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Decrease size of au1xxx_dbdma_pm_regs[][]Roel Kluin2009-09-301-5/+3
| | | | | | | | | | | There are 16 individual channels (NUM_DBDMA_CHANS) to save/restore plus the global ddma block config (the +1). The last register in a channel can be skipped since it's read-only (at offset 0x18). Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: Manuel Lauss <manuel.lauss@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMP: Inline arch_send_call_function_{single_ipi,ipi_mask}Ralf Baechle2009-09-302-15/+13
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMP: Fix build.Ralf Baechle2009-09-302-2/+2
| | | | | | | | | | commit 48a048fed82a8e5fdd8618574f6d3de1a0d67a50 Author: Rusty Russell <rusty@rustcorp.com.au> Date: Thu Sep 24 09:34:44 2009 -0600 apparently only passed the "looks good" level of QA ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.Kevin Cernekee2009-09-301-0/+5
| | | | | | | | This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover MIPSxx-style board cache code. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Fix compilation error.Mark Mason2009-09-301-1/+1
| | | | | | | Build error introduced by d4f587c67fc39e0030ddd718675e252e208da4d7. Signed-off-by: Mark Mason <mmason@upwardaccess.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM1480: Re-apply patch lost due to bad resolution of merge conflict.Ralf Baechle2009-09-301-4/+0
| | | | | | | | | | | | | Patch 14275ccdb1e4b487cca745aba994699c426a31ee and d5dedd4507d307eb3f35f21b6e16f336fdc0d82a are conflicting and the conflict was resolved badly in merge 92241940be501f798cb21db344bbb3d1ec3c4f1c resulting in the BCM1480 changes of 14275ccdb1e4b487cca745aba994699c426a31ee getting lost. Sort out the damage. Reported and initial patch by Mark Mason <mmason@upwardaccess.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add serial driver for bcm63xx integrated UART.Maxime Bizon2009-09-304-1/+51
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson2: Fix typo "enalbe" -> "enable"Uwe Kleine-König2009-09-301-7/+7
| | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Yanhua <yanh@lemote.com> Cc: Robert Richter <robert.richter@amd.com> Acked-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMTC: Remove duplicate structure field initializationJulia Lawall2009-09-301-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definition of the irq_ipi structure has two initializations of the flags field. This combines them. [Ralf: The issue was originally introduced by commit be4894196d79455f420dd7bb78be7dc73bec115c (linux-mips.org) rsp. 033890b084adfa367c544864451d7730552ce8bf (kernel.org). The original intention of the code was to initialize .flags with both flags ored together. The broken C code as actually implemented will be compiled by an equally broken gcc to use only the last initialization, that is IRQF_PERCPU which means this turned into an SMTC bug for 2.6.23 and newer.] The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ identifier I, s, fld; position p0,p; expression E; @@ struct I s =@p0 { ... .fld@p = E, ...}; @s@ identifier I, s, r.fld; position r.p0,p; expression E; @@ struct I s =@p0 { ... .fld@p = E, ...}; @script:python@ p0 << r.p0; fld << r.fld; ps << s.p; pr << r.p; @@ if int(ps[0].line)!=int(pr[0].line) or int(ps[0].column)!=int(pr[0].column): cocci.print_main(fld,p0) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove duplicated #includeHuang Weiyi2009-09-301-1/+0
| | | | | | | Remove duplicated #include in arch/mips/kernel/smp.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Remove duplicated #includeHuang Weiyi2009-09-301-1/+0
| | | | | | | Remove duplicated #include in arch/mips/bcm63xx/boards/board_bcm963xx.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: fix build of vmlinux.ldsManuel Lauss2009-09-252-6/+8
| | | | | | | | | | | | | | Commit 51b563fc93c8cb5bff1d67a0a71c374e4a4ea049 ("arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0") removed a few CPPFLAGS with vital include paths necessary to build vmlinux.lds on MIPS, and moved the calculation of the 'jiffies' symbol directly to vmlinux.lds.S but forgot to change make ifdef/... to cpp macros. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> [sam: moved assignment of CPPFLAGS arch/mips/kernel/Makefile] Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
* sysctl: remove "struct file *" argument of ->proc_handlerAlexey Dobriyan2009-09-241-9/+9
| | | | | | | | | | | | | | | | | | | | | It's unused. It isn't needed -- read or write flag is already passed and sysctl shouldn't care about the rest. It _was_ used in two places at arch/frv for some reason. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Cc: David Howells <dhowells@redhat.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Cc: James Morris <jmorris@namei.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linusLinus Torvalds2009-09-2318-38/+40
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus: (39 commits) cpumask: Move deprecated functions to end of header. cpumask: remove unused deprecated functions, avoid accusations of insanity cpumask: use new-style cpumask ops in mm/quicklist. cpumask: use mm_cpumask() wrapper: x86 cpumask: use mm_cpumask() wrapper: um cpumask: use mm_cpumask() wrapper: mips cpumask: use mm_cpumask() wrapper: mn10300 cpumask: use mm_cpumask() wrapper: m32r cpumask: use mm_cpumask() wrapper: arm cpumask: Use accessors for cpu_*_mask: um cpumask: Use accessors for cpu_*_mask: powerpc cpumask: Use accessors for cpu_*_mask: mips cpumask: Use accessors for cpu_*_mask: m32r cpumask: remove arch_send_call_function_ipi cpumask: arch_send_call_function_ipi_mask: s390 cpumask: arch_send_call_function_ipi_mask: powerpc cpumask: arch_send_call_function_ipi_mask: mips cpumask: arch_send_call_function_ipi_mask: m32r cpumask: arch_send_call_function_ipi_mask: alpha cpumask: remove obsolete topology_core_siblings and topology_thread_siblings: ia64 ...
| * cpumask: use mm_cpumask() wrapper: mipsRusty Russell2009-09-242-6/+6
| | | | | | | | | | | | | | | | | | Makes code futureproof against the impending change to mm->cpu_vm_mask. It's also a chance to use the new cpumask_ ops which take a pointer (the older ones are deprecated, but there's no hurry for arch code). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * cpumask: Use accessors for cpu_*_mask: mipsRusty Russell2009-09-244-8/+8
| | | | | | | | | | | | | | | | Use the accessors rather than frobbing bits directly (the new versions are const). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com>
| * cpumask: remove arch_send_call_function_ipiRusty Russell2009-09-241-1/+0
| | | | | | | | | | | | | | Now everyone is converted to arch_send_call_function_ipi_mask, remove the shim and the #defines. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * cpumask: arch_send_call_function_ipi_mask: mipsRusty Russell2009-09-2412-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | We're weaning the core code off handing cpumask's around on-stack. This introduces arch_send_call_function_ipi_mask(), and by defining it, the old arch_send_call_function_ipi is defined by the core code. We also take the chance to wean the implementations off the obsolescent for_each_cpu_mask(): making send_ipi_mask take the pointer seemed the most natural way to ensure all implementations used for_each_cpu. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>