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arch
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sparc64
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kernel
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tsb.S
Commit message (
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Author
Age
Files
Lines
*
[SPARC64]: Refine register window trap handling.
David S. Miller
2006-03-20
1
-1
/
+0
*
[SPARC64]: Add explicit register args to trap state loading macros.
David S. Miller
2006-03-20
1
-8
/
+1
*
[SPARC64]: Access TSB with physical addresses when possible.
David S. Miller
2006-03-20
1
-5
/
+30
*
[SPARC64]: Fix too early reference to %g6
David S. Miller
2006-03-20
1
-2
/
+5
*
[SPARC64]: Kill PROM locked TLB entry preservation code.
David S. Miller
2006-03-20
1
-7
/
+0
*
[SPARC64]: Use sparc64_highest_unlocked_tlb_ent in __tsb_context_switch()
David S. Miller
2006-03-20
1
-6
/
+8
*
[SPARC64]: Preload TSB entries from update_mmu_cache().
David S. Miller
2006-03-20
1
-0
/
+17
*
[SPARC64]: Add infrastructure for dynamic TSB sizing.
David S. Miller
2006-03-20
1
-34
/
+21
*
[SPARC64]: TSB refinements.
David S. Miller
2006-03-20
1
-0
/
+11
*
[SPARC64]: Elminate all usage of hard-coded trap globals.
David S. Miller
2006-03-20
1
-6
/
+20
*
[SPARC64]: Move away from virtual page tables, part 1.
David S. Miller
2006-03-20
1
-0
/
+169