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* x86: remove open-coded save/load segment operationsJeremy Fitzhardinge2008-07-081-1/+2
* x86: perfctr-watchdog.c - coding style cleanupCyrill Gorcunov2008-07-081-90/+112
* x86: move boot_params declaring to setup.cYinghai Lu2008-07-081-6/+0
* x86: merge setup64.c into common_64.cYinghai Lu2008-07-081-1/+276
* x86: change identify_cpu to staticYinghai Lu2008-07-082-2/+2
* x86: seperate funcs from setup_64 to cpu common_64.cYinghai Lu2008-07-082-1/+407
* x86: clean up init_amd()Yinghai Lu2008-07-081-8/+14
* Merge branch 'x86/nmi' into x86/develIngo Molnar2008-07-081-1/+3
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| * Merge branch 'linus' into x86/nmiIngo Molnar2008-06-162-3/+14
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| * | x86: watchdog - check for CPU is being supportedCyrill Gorcunov2008-06-051-1/+3
* | | Merge branch 'x86/mpparse' into x86/develIngo Molnar2008-07-083-32/+910
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| * | | x86: rename two e820 related functionsYinghai Lu2008-07-081-1/+1
| * | | Merge branch 'linus' into tmp.x86.mpparse.newIngo Molnar2008-07-082-3/+14
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| * | | x86: mtrr cleanup for converting continuous to discrete layout - fix #2Yinghai Lu2008-05-251-31/+48
| * | | x86: amd opteron TOM2 mask val fixYinghai Lu2008-05-251-1/+1
| * | | x86: process fam 10h like k8 with fixed mtrr settingYinghai Lu2008-05-251-1/+1
| * | | x86: mtrr cleanup for converting continuous to discrete - auto detect v4Yinghai Lu2008-05-251-146/+464
| * | | x86: mtrr cleanup for converting continuous to discrete layout v8 - fixYinghai Lu2008-05-251-74/+90
| * | | x86: fix trimming e820 with MTRR holes. - fixYinghai Lu2008-05-251-29/+15
| * | | x86: fix trimming e820 with MTRR holes.Yinghai Lu2008-05-251-17/+84
| * | | x86: mtrr cleanup for converting continuous to discrete layout, v8Yinghai Lu2008-05-253-14/+488
| * | | x86: fix sparse warning in mtrr/generic.cThomas Gleixner2008-05-251-4/+4
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*---------. \ \ Merge branches 'x86/numa-fixes', 'x86/apic', 'x86/apm', 'x86/bitops', 'x86/bu...Ingo Molnar2008-07-0816-154/+543
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| | | | | | * Merge branch 'linus' into x86/patIngo Molnar2008-06-162-3/+14
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| | | | | | * x86: PAT: fixed checkpatch errors (and whitespaces)Andreas Herrmann2008-06-121-2/+0
| | | | | | * x86: PAT: fix ambiguous paranoia check in pat_init()Andreas Herrmann2008-06-121-3/+4
| | | | | | * x86: unconditionally enable PAT for AMD CPUsAndreas Herrmann2008-06-121-4/+1
| | | | | | * x86: Add Centaur and Transmeta CPUs to PAT whitelistDave Jones2008-05-221-0/+3
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| | | | | * x86, mce_64.c: mce_cpu_quirks being ignoredVenki Pallipadi2008-07-031-1/+5
| | | | | * Merge commit 'v2.6.26-rc8' into x86/mceIngo Molnar2008-07-032-3/+14
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| | | | | * x86: correctly report NR_BANKS in mce_64.cDaniel Rahn2008-06-181-1/+1
| | | | | * x86: remove 6 bank limitation in 64 bit MCE reporting codeVenki Pallipadi2008-05-121-8/+12
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| | | | * x86: add new cache descriptorDave Jones2008-05-121-0/+1
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| | | * x86: make 64-bit identify_cpu use cpu_devYinghai Lu2008-07-084-10/+44
| | | * x86: Move PCI IO ECS code to x86/pciRobert Richter2008-07-083-9/+0
| | | * x86, clockevents: add C1E aware idle functionThomas Gleixner2008-07-082-55/+0
| | | * x86: use cpuinfo to check for interrupt pending message msrThomas Gleixner2008-06-102-49/+30
| | | * x86: cleanup C1E enabled detectionThomas Gleixner2008-06-102-6/+4
| | | * fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Robert Richter2008-06-103-2/+6
| | | * x86: move bugs_64.c to cpu/bugs_64.cHiroshi Shimamoto2008-06-032-0/+34
| | | * fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Ingo Molnar2008-06-021-0/+1
| | | * x86: add PCI extended config space access for AMD BarcelonaRobert Richter2008-06-022-0/+7
| | | * x86: fix overlong line in arch/x86/kernel/cpu/amd_64.cH. Peter Anvin2008-05-301-1/+2
| | | * x86: Move the 64-bit Centaur specific parts out of setup_64.cDave Jones2008-05-302-0/+32
| | | * x86: Remove workaround for prescott (32bit P4) from 64-bit code.Dave Jones2008-05-301-5/+0
| | | * x86: Move the 64-bit Intel specific parts out of setup_64.cDave Jones2008-05-302-0/+98
| | | * x86: Move the AMD64 specific parts out of setup_64.cDave Jones2008-05-302-0/+236
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| | * x86: coding style fixes to x86/kernel/cpu/cpufreq/cpufreq-nforce2.cPaolo Ciarrocchi2008-06-181-21/+23
| | * x86: coding style fixes to arch/x86/kernel/cpu/mcheck/k7.cPaolo Ciarrocchi2008-06-181-18/+18
| | * x86: coding style fixes to arch/x86/kernel/cpu/mcheck/p4.cPaolo Ciarrocchi2008-06-181-45/+45
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