| Commit message (Collapse) | Author | Age | Files | Lines |
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Merge branch 'orion-devel' into devel
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- Make sure that coprocessor instructions for range ops are contiguous
and not reordered.
- s/invalidate_and_disable_dcache/flush_and_disable_dcache/
- Don't re-enable I/D caches if they were not enabled initially.
- Change some masks to shifts for better generated code.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Lennert Buytenhek <buytenh@marvell.com>
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This patch adds specific power-off method for Buffalo Linkstation Mini
board. The board has a hardware switch which should be monitored from
userspace. When the switch is in OFF position the board should be rebooted
and U-Boot will start in an idle mode and wait for the user to move the
power switch back to ON position.
Signed-off-by: Alexey Kopytko <alexey@kopytko.ru>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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This patch adds support for Buffalo Linkstation Mini board.
Signed-off-by: Alexey Kopytko <alexey@kopytko.ru>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Feroceon L2 cache can work in eighther write through or write back mode
on Kirkwood. Add the option to configure this mode according to Kconfig.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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This patch provides standard GPIO LED control
for the ED Mini V2, with software blinking only
(CPLD hardware blinking capability is not used).
This patch also provides status of the power
button as a standard GPIO input event.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Remove uart1 init calls for boards that use the physical pins onto
which the UART1 signals are multiplexed for different purposes.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Add support to the Kirkwood port for newer device models and silicon
revisions. Instead of looking at the DEVICE_ID register, the device
version is now determined by looking at the PCI-Express device ID and
revision registers, as it is done for orion5x, and this information
is used to determine the TCLK frequency, again, as it is done for
orion5x.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Currently, kirkwood uses a hardcoded timer tick rate of 166 MHz, but
the actual timer tick rate varies between different members of the SoC
family.
This patch prepares for runtime determination of the timer tick rate.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
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The RD88F6183AP-GE is an access point reference design for the
88F6183 SoC, with a 88E6161 six-port gigabit ethernet switch with
five PHYs (providing 1 WAN and 4 LAN ports and an interface to the
CPU), and a mini-PCIe slot for a wireless card.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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The Orion-1-90 (88F6183) is another member of the Orion SoC family,
which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as
Root Complex or Endpoint), one 10/100/1000 ethernet interface, one
USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface,
one TWSI interface, two UARTs, one SPI interface, a NAND controller,
a crypto engine, and a 4-channel DMA engine.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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This patch adds support for the Buffalo Terastation Pro II/Live.
Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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This patch adds support for the LaCie Ethernet Disk mini V2.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Christopher Moore <moore@free.fr>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but
the actual timer tick rate varies between different members of the SoC
family (and can vary based on strap pin settings).
This patch prepares for runtime determination of the timer tick rate.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Wire up the ethernet port's error interrupt so that the
mv643xx_eth driver can sleep for SMI event completion instead of
having to busy-wait for it.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Wire up the ethernet port's error interrupt so that the
mv643xx_eth driver can sleep for SMI event completion instead of
having to busy-wait for it.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Wire up the ethernet port's error interrupt so that the
mv643xx_eth driver can sleep for SMI event completion instead of
having to busy-wait for it.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Merge branch 'davinci' into devel
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Update DaVinci EVM board setup to work with key drivers which are
now in mainline kernels:
- I2C adapter (driver: i2c_davinci)
* three gpio expanders (driver: pcf8574) used for
- LEDs
- audio codec control
- misc device control (including USB VBUS, IDE-vs-CF)
* at24 (driver: at24) eeprom
- USB controller (driver: musb_hdrc)
- IDE controller (driver: palm_bk3710)
This board is the first in-tree client for a number of those drivers,
and adding this board support means the EVM board can be used for some
"real work" ... excepting "DaVinci Technology" video and DSP support
(also available in most OMAP3 chips).
Also renames the flash as "evm_norflash", since NAND may be jumpered.
(Patch contains work by myself, Kevin Hilman, Sergei Shtylyov.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
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Declare the musb_hdrc platform device for DaVinci.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Davinci I2C initialization infrastructure; will be used by EVM init.
[ dbrownell@users.sourceforge.net: pass platform data into init code ]
Signed-off-by: Komal Shah <komal_shah802003@yahoo.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Switch DaVinci SOC gpios over to using the new GPIO library, so it can
access GPIO expanders and other non-SOC GPIOs using the same calls.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] Fix PCI_DMA_BUS_IS_PHYS for ARM
[ARM] 5247/1: tosa: SW_EAR_IN support
[ARM] 5246/1: tosa: add proper clock alias for tc6393xb clock
[ARM] 5245/1: Fix warning about unused return value in drivers/pcmcia
[ARM] OMAP: Fix MMC device data
imx serial: fix rts handling for non imx1 based hardware
imx serial: set RXD mux bit on i.MX27 and i.MX31
i.MX serial: fix init failure
pcm037: add rts/cts support for serial port
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PCI_DMA_BUS_IS_PHYS was defined to be zero, which meant we ignored
the DMA mask for IDE and SCSI transfers. This is wrong - we have
no DMA translation hardware. We want to obey DMA masks so that the
block layer performs bouncing itself.
Reported-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git
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We have rts/cts pins on the first serial port on the pcm037. Enable it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add clock alias for clock that is used by tc6393xb device on tosa.
As that chip plays pretty major part in tosa life and is currently
disabled, this is 2.4.27 material.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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OMAPs MMC device data was passing the wrong structure via the platform
device. Moreover, a missing function means that both sx1_defconfig
and omap_h2_1610_defconfig builds failed with
undefined reference to `omap_set_mmc_info'
errors. Fix this by updating the MMC support from the omapzoom tree.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc: Fix user_regset 'n' field values.
sparc64: Fix PCI error interrupt registry on PSYCHO.
sparc32: Fix function signature of of_bus_sbus_get_flags().
sparc64: Fix interrupt register calculations on Psycho and Sabre.
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As noticed by Russell King, we were not setting this properly
to the number of entries, but rather the total size.
This results in the core dumping code allocating waayyyy too
much memory.
Signed-off-by: David S. Miller <davem@davemloft.net>
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We need to pass IRQF_SHARED, otherwise we get things like:
IRQ handler type mismatch for IRQ 33
current handler: PSYCHO_UE
Call Trace:
[000000000048394c] request_irq+0xac/0x120
[00000000007c5f6c] psycho_scan_bus+0x98/0x158
[00000000007c2bc0] pcibios_init+0xdc/0x12c
[0000000000426a5c] do_one_initcall+0x1c/0x160
[00000000007c0180] kernel_init+0x9c/0xfc
[0000000000427050] kernel_thread+0x30/0x60
[00000000006ae1d0] rest_init+0x10/0x60
on e3500 and similar systems.
On a single board, the UE interrupts of two Psycho nodes
are funneled through the same interrupt, from of_debug=3
dump:
/pci@b,4000: direct translate 2ee --> 21
...
/pci@b,2000: direct translate 2ee --> 21
Decimal "33" mentioned above is the hex "21" mentioned here.
Thanks to Meelis Roos for dumps and testing.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This doesn't match the function pointer type it gets assigned
to. Luckily, this was harmless.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Use the IMAP offset calculation for OBIO devices as documented in the
programmer's manual. Which is "0x10000 + ((ino & 0x1f) << 3)"
Signed-off-by: David S. Miller <davem@davemloft.net>
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Change the MN10300 fault handler to make it check in_atomic() rather than
in_interrupt() as commit 6edaf68a87d17570790fd55f0c451a29ec1d6703 did for other
architectures:
Author: Peter Zijlstra <a.p.zijlstra@chello.nl>
Date: Wed Dec 6 20:32:18 2006 -0800
[PATCH] mm: arch do_page_fault() vs in_atomic()
In light of the recent pagefault and filemap_copy_from_user work I've
gone through all the arch pagefault handlers to make sure the
inc_preempt_count() 'feature' works as expected.
Several sections of code (including the new filemap_copy_from_user)
rely on the fact that faults do not take locks under increased preempt
count.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm
* 'kvm-updates/2.6.27' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm:
KVM: VMX: Always return old for clear_flush_young() when using EPT
KVM: SVM: fix guest global tlb flushes with NPT
KVM: SVM: fix random segfaults with NPT enabled
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As well as discard fake accessed bit and dirty bit of EPT.
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
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Accesses to CR4 are intercepted even with Nested Paging enabled. But the code
does not check if the guest wants to do a global TLB flush. So this flush gets
lost. This patch adds the check and the flush to svm_set_cr4.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
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This patch introduces a guest TLB flush on every NPF exit in KVM. This fixes
random segfaults and #UD exceptions in the guest seen under some workloads
(e.g. long running compile workloads or tbench). A kernbench run with and
without that fix showed that it has a slowdown lower than 0.5%
Cc: stable@kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@qumranet.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] prevent ia64 from invoking irq handlers on offline CPUs
[IA64] arch/ia64/sn/pci/tioca_provider.c: introduce missing kfree
[IA64] fix up bte.h
[IA64] fix compile failure with non modular builds
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Make ia64 refrain from clearing a given to-be-offlined CPU's bit in the
cpu_online_mask until it has processed pending irqs. This change
prevents other CPUs from being blindsided by an apparently offline CPU
nevertheless changing globally visible state. Also remove the existing
redundant cpu_clear(cpu, cpu_online_map).
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Error handling code following a kmalloc should free the allocated data.
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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bte.h expects a #define of L1_CACHE_MASK which is currently only
in bte.c. This small patch gets bte.h to include cleanly and makes
BTE_UNALIGNED_COPY not report errors.
Signed-off-by: Robin Holt <holt@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Broke the non modular builds by moving an essential function into
modules.c. Fix this by moving it out again and into asm/sections.h as
an inline. To do this, the definitions of struct fdesc and struct
got_val have been lifted out of modules.c and put in asm/elf.h where
they belong.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git
Merge branch 'imx-devel' into devel
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This patch adds DMA support for Freescale i.MX27 SoCs. It is derived
from the i.MX1 port and should (though currently untested) still be
working for the i.MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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