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* Pull proc-cpuinfo-siblings into release branchTony Luck2005-10-281-1/+1
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| * [IA64] fix siblings field value in /proc/cpuinfoSiddha, Suresh B2005-10-251-1/+1
| | | | | | | | | | | | | | | | | | Fix the "siblings" field value in /proc/cpuinfo so that it now shows the number of siblings as seen by OS, instead of what is available from hardware perspective. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | Pull big-sim-disk into release branchTony Luck2005-10-281-5/+8
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| * | [IA64] Allow simulator to use bigger disksPeter Chubb2005-10-251-5/+8
| |/ | | | | | | | | | | | | | | | | | | | | The simscsi code at present overflows an int if it's given a large disk image. The attached patch increases the possible size to 128G. While it's unlikely that anyone will want to use SKI with such a large drive, the same framework is currently being used for various virtualisation experiments. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | Pull sparsemem-v5 into release branchTony Luck2005-10-287-46/+1445
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| * | [PATCH] V5 ia64 SPARSEMEM - gensparse_defconfigBob Picco2005-10-041-0/+1319
| | | | | | | | | | | | | | | | | | | | | | | | gensparse_defconfig is a config generated file for SPARSEMEM and GENERIC kernel configuration (defconfig). Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [PATCH] V5 ia64 SPARSEMEM - SPARSEMEM code changesBob Picco2005-10-043-3/+66
| | | | | | | | | | | | | | | | | | | | | This patch is the minimal set of changes required by ia64 to use SPARSEMEM. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [PATCH] V5 ia64 SPARSEMEM - eliminate contig_page_dataBob Picco2005-10-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | For FLATMEM contig_page_data has been made transparent to the arch code. This patch conforms to that change. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [PATCH] V5 ia64 SPARSEMEM - Kconfig and MakefileBob Picco2005-10-042-41/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch modifies the Kconfig file to introduce the new memory model options and other related SPARSEMEM changes. There is also a minor change in the Makefile. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Pull new-efi-memmap into release branchTony Luck2005-10-283-192/+367
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| * | | [IA64] end of kernel 'data' is at _end, not _edataTony Luck2005-09-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /proc/iomem describes a block of memory as "Kernel data", but the end address is derived from "_edata". The kernel actually has many other sections beyond _edata. Get the real end address from _end. Acked-by: Khalid Aziz <khalid_aziz@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | [IA64] include EFI memory information in /proc/iomemKhalid Aziz2005-09-192-0/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | User mode kexec tools expect to find information about physical memory in /proc/iomem (as they do on x86) to validate the addresses that the new kernel will use. Signed-off-by: Khalid Aziz <khalid.aziz@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | [IA64] simplified efi memory map parsingTony Luck2005-09-083-192/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New version leaves the original memory map unmodified. Also saves any granule trimmings for use by the uncached memory allocator. Inspired by Khalid Aziz (various traces of his patch still remain). Fixes to uncached_build_memmap() and sn2 testing by Martin Hicks. Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | Pull define-node-cleanup into release branchTony Luck2005-10-285-118/+57
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| * | | | [IA64] Cleanup use of various #defines related to nodesJack Steiner2005-09-155-118/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the SN code & #defines related to compact nodes & IO discovery have gotten stale over the years. This patch attempts to clean them up. Some of the various SN MAX_xxx #defines were also unclear & misused. The primary changes are: - use MAX_NUMNODES. This is the generic linux #define for the number of nodes that are known to the generic kernel. Arrays & loops for constructs that are 1:1 with linux-defined nodes should use the linux #define - not an SN equivalent. - use MAX_COMPACT_NODES for MAX_NUMNODES + NUM_TIOS. This is the number of nodes in the SSI system. Compact nodes are a hack to get around the IA64 architectural limit of 256 nodes. Large SGI systems have more than 256 nodes. When we upgrade to ACPI3.0, I _hope_ that all nodes will be real nodes that are known to the generic kernel. That will allow us to delete the notion of "compact nodes". - add MAX_NUMALINK_NODES for the total number of nodes that are in the numalink domain - all partitions. - simplified (understandable) scan_for_ionodes() - small amount of cleanup related to cnodes Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | Pull sn_pci_legacy_read-write into release branchTony Luck2005-10-281-0/+46
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| * | | | | [IA64-SGI] fix sn_pci_legacy_read/fix sn_pci_legacy_writeMark Maule2005-09-231-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a #define for SN_SAL_IOIF_PCI_SAFE and makes that the preferred method of implementing sn_pci_legacy_read() and sn_pci_legacy_write(). This SAL call has been present in SGI proms since version 4.10. If the SN_SAL_IOIF_PCI_SAFE call fails, revert to the previous code for compatability with older proms. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | Pull acpi-produce-consume into release branchTony Luck2005-10-281-8/+27
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| * | | | | | [IA64] respect ACPI producer/consumer flag for PCI root bridgesBjorn Helgaas2005-09-231-8/+27
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Address space resources for ACPI devices have a producer/consumer flag. All devices "consume" the indicated address space. If the resource is marked as a "producer", the range is also passed on to child devices. We currently ignore this flag when setting up MMIO and I/O port windows for PCI root bridges, so we could mistakenly interpret a "consumed-only" range, like CSR space for the device itself, as a window that is routed to children. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | Pull update-default-configs into release branchTony Luck2005-10-284-262/+576
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| * | | | | | [IA64] Update default configsBjorn Helgaas2005-09-154-262/+576
| | |/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PNP and PNPACPI turned on i8042 recently changed from ACPI to PNP detection. Without PNP, it probes legacy I/O ports for the keyboard controller, which causes an MCA on HP boxes. Also, I'm about to remove 8250_acpi.c, so we'll need PNP to detect non-PCI serial ports. Until 8250_acpi.c is removed, some systems will see serial ports reported twice (once from 8250_acpi.c and again from 8250_pnp.c). This is harmless. PNPACPI is still marked EXPERIMENTAL, but I'm not aware of any outstanding issues on ia64. IDE_GENERIC turned off (except for SGI simulator, all ia64 IDE is PCI) ide-generic probes compiled-in legacy I/O ports for IDE devices, which again causes an MCA. It would be nicer to just get rid of all the legacy junk from include/asm-ia64/ide.h, but that is a bit riskier because it could break ide-cs and the HDIO_REGISTER_HWIF ioctl (http://www.ussg.iu.edu/hypermail/linux/kernel/0508.2/0049.html). Here's the essence of the patch: -# CONFIG_PNP is not set +CONFIG_PNP=y +CONFIG_PNPACPI=y -CONFIG_IDE_GENERIC=y +# CONFIG_IDE_GENERIC is not set Tested on tiger, bigsur, and zx1. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | Pull move-iosapic-to-acpi into release branchTony Luck2005-10-282-25/+11
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| * | | | | | [IA64] move ACPI IOSAPIC locality domain mapping from pci.c to acpi.cBjorn Helgaas2005-09-192-25/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move acpi_map_iosapics() from pci.c to acpi.c, since it doesn't have anything to do with PCI. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | Pull ar-k0-usage into release branchTony Luck2005-10-281-13/+16
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| * | | | | | | [IA64] ia64: add ar.k0 usage noteBjorn Helgaas2005-09-191-13/+16
| |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update comment about how ar.k0 is used. Make the initialization the same as in start_secondary() (no functional change, just make it look more similar). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | Pull 1024-cpu into release branchTony Luck2005-10-281-2/+2
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| * | | | | | | [IA64] Increase max NR_CPUS on IA64 from 512 to 1024Jack Steiner2005-09-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch increases the maximum number of cpus supported on IA64 to 1024. No changes are made to the default SSI size. The patch simply allows specifying up to 1024p. There are certainly scaling (& other) issues that also need to be addressed!!! Additional patches will follow..... Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | | Pull hp-machvec into release branchTony Luck2005-10-283-15/+145
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| * | | | | | | | [IA64] more robust zx1/sx1000 machvec supportAlex Williamson2005-09-143-15/+145
| | |_|/ / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Machine vector selection has always been a bit of a hack given how early in system boot it needs to be done. Services like ACPI namespace are not available and there are non-trivial problems to moving them to early boot. However, there's no reason we can't change to a different machvec later in boot when the services we need are available. By adding a entry point for later initialization of the swiotlb, we can add an error path for the hpzx1 machevec initialization and fall back to the DIG machine vector if IOMMU hardware isn't found in the system. Since ia64 uses 4GB for zone DMA (no ISA support), it's trivial to allocate a contiguous range from the slab for bounce buffer usage. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | | Pull altix-mmr into release branchTony Luck2005-10-283-58/+63
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| * | | | | | | | [IA64] Need to include <asm/sn/io.h> in a few more places.Tony Luck2005-09-093-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | | [IA64-SGI] volatile semantics in places where it seems necessaryMark Maule2005-09-073-58/+60
| | |_|_|_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resend using accessors instead of volatile qualifiers per hch comments, and easier to understand convenience macros per rja comments. Patch to apply volatile semantics when accessing MMR's in various SN files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | | Pull altix-fpga-reset into release branchTony Luck2005-10-281-29/+33
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| * | | | | | | | [IA64] Altix patch for fpga resetBruce Losure2005-09-061-29/+33
| |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) workaround a h/w reset issue 2) to improve the determination of FPGA-based h/w in the arch/ia64/sn/kernel/tiocx code. Signed-off-by: Bruce Losure <blosure@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-261-0/+2
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| * | | | | | | | [ARM] fix sharp zaurus c-3000 compile failure without CONFIG_FB_PXAPavel Machek2005-10-241-0/+2
| | |_|_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes compile problem when CONFIG_FB_PXA is not set. LD .tmp_vmlinux1 arch/arm/mach-pxa/built-in.o(.text+0x1d74): In function `spitz_get_hsync_len': : undefined reference to `pxafb_get_hsync_time' make: *** [.tmp_vmlinux1] Error 1 3.46user 0.46system 5.10 (0m5.106s) elapsed 77.01%CPU Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | | | [PATCH] ppc64: Fix wrong register mapping in mpic driverBenjamin Herrenschmidt2005-10-261-2/+2
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mpic interrupt controller driver (used on G5 and early pSeries among others) has a bug where it doesn't get the right virtual address for the timer registers. It causes the driver to poke at the MMIO space of whatever has been mapped just next to it (ouch !) when initializing and causes boot failures on some IBM machines. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] uml: fix compile failure for TT modeMiklos Szeredi2005-10-242-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch, uml compile fails with: LD .tmp_vmlinux1 arch/um/kernel/built-in.o: In function `config_gdb_cb': arch/um/kernel/tt/gdb.c:129: undefined reference to `TASK_EXTERN_PID' Tested on i386, but fix needed on x86_64 too AFAICS. Signed-off-by: Miklos Szeredi <miklos@szeredi.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] typo fix in last cpufreq powernow patchChris Wright2005-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not sure how it slipped by, but here's a trivial typo fix for powernow. Signed-off-by: Chris Wright <chrisw@osdl.org> [ It's "nurter" backwards.. Maybe we have a hillbilly The Shining fan? ] Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] cpufreq: fix pending powernow timer stuck conditionDave Jones2005-10-211-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD recently discovered that on some hardware, there is a race condition possible when a C-state change request goes onto the bus at the same time as a P-state change request. Both requests happen, but the southbridge hardware only acknowledges the C-state change. The PowerNow! driver is then stuck in a loop, waiting for the P-state change acknowledgement. The driver eventually times out, but can no longer perform P-state changes. It turns out the solution is to resend the P-state change, which the southbridge will acknowledge normally. Thanks to Johannes Winkelmann for reporting this and testing the fix. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] ppc64: Fix typo bug in iSeries hash codeDavid Gibson2005-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a stupid typo bug in the iSeries hash table code. When we place a hash PTE in the secondary bucket, instead of setting the SECONDARY flag bit, as we should, we (redundantly) set the VALID flag. This was introduced with the patch abolishing bitfields from the hash table code. Mea culpa, oops. It hasn't been noticed until now because in practice we don't hit the secondary bucket terribly often. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-213-10/+31
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| * | | | | | | [ARM] Fix Integrator IM/PD-1 supportRussell King2005-10-211-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | [ARM] 3027/1: BAST - reduce NAND timings slightlyBen Dooks2005-10-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Ben Dooks The current Simtec BAST nand area timings are a little too slow to be obtained by a 2410 running at 266MHz, so reduce the timings slightly to bring them into the acceptable range. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | [ARM] 3025/1: Add I2S platform device for PXAMatt Reimer2005-10-201-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Matt Reimer Adds an I2S platform_device for PXA. I2S is used to interface with sound chips on systems like iPAQ h1910/h2200/hx4700 and Asus 716. Signed-off-by: mreimer@vpop.net Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | | | [PATCH] ppc64: Fix pages marked dirty abusivelyBenjamin Herrenschmidt2005-10-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While working on 64K pages, I found this little buglet in our update_mmu_cache() implementation. The code calls __hash_page() passing it an "access" parameter (the type of access that triggers the hash) containing the bits _PAGE_RW and _PAGE_USER of the linux PTE. The latter is useless in this case and the former is wrong. In fact, if we have a writeable PTE and we pass _PAGE_RW to hash_page(), it will set _PAGE_DIRTY (since we track dirty that way, by hash faulting !dirty) which is not what we want. In fact, the correct fix is to always pass 0. That means that only read-only or already dirty read write PTEs will be preloaded. The (hopefully rare) case of a non dirty read write PTE can't be preloaded this way, it will have to fault in hash_page on the actual access. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | | [PATCH] ppc64: Fix typo in time calculationsPaul Mackerras2005-10-211-1/+1
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a typo in the div128_by_32 function used in the timekeeping calculations on ppc64. If you look at the code it's quite obvious that we need (rb + c) rather than (rb + b). The "b" is clearly just a typo. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] build fix for uml/amd64Al Viro2005-10-191-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Missing half of the [PATCH] uml: Fix sysrq-r support for skas mode We need to remove these (UPT_[DEFG]S) from the read side as well as the write one - otherwise it simply won't build. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Acked-by: Jeff Dike <jdike@addtoit.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | [PATCH] ppc64: update defconfigsPaul Mackerras2005-10-196-163/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-191-1/+8
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