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* mm: thp: tail page refcounting fixAndrea Arcangeli2011-11-112-4/+6
* um: fix ubd cow sizeRichard Weinberger2011-11-111-1/+30
* ARM: mach-ux500: unlock I&D l2x0 caches before initLinus Walleij2011-11-111-1/+24
* plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desiredPaul Fertser2011-11-111-5/+5
* iommu/amd: Fix wrong shift directionJoerg Roedel2011-11-111-1/+1
* memory leak with RCU_TABLE_FREEMartin Schwidefsky2011-11-111-2/+3
* user per registers vs. ptrace single steppingMartin Schwidefsky2011-11-111-14/+16
* KVM: s390: check cpu_id prior to using itCarsten Otte2011-11-111-4/+10
* apic, i386/bigsmp: Fix false warnings regarding logical APIC ID mismatchesJan Beulich2011-11-113-13/+19
* x86: Fix compilation bug in kprobes' twobyte_is_boostableJosh Stone2011-11-111-1/+3
* x86: uv2: Workaround for UV2 Hub bug (system global address format)Jack Steiner2011-11-114-16/+46
* x86: Fix S4 regressionTakashi Iwai2011-10-251-2/+1
* ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon2011-10-251-2/+2
* ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGESLinus Walleij2011-10-251-0/+7
* MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)Rafael J. Wysocki2011-10-161-30/+22
* ARM: mach-ux500: enable fix for ARM errata 754322srinidhi kasagar2011-10-161-0/+1
* x86/PCI: use host bridge _CRS info on ASUS M2V-MX SEPaul Menzel2011-10-161-0/+11
* sparc64: Force the execute bit in OpenFirmware's translation entries.David S. Miller2011-10-161-0/+5
* ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon2011-10-031-17/+17
* ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeedWill Deacon2011-10-033-0/+44
* ARM: dma-mapping: free allocated page if unable to mapRussell King2011-10-031-0/+2
* perf, x86: Add model 45 SandyBridge supportYouquan Song2011-10-031-0/+1
* xen/e820: if there is no dom0_mem=, don't tweak extra_pages.David Vrabel2011-10-031-4/+6
* xen: use maximum reservation to limit amount of usable RAMDavid Vrabel2011-10-031-0/+19
* ARM: Dove: fix second SPI initialization callNicolas Pitre2011-10-031-1/+1
* iommu/amd: Make sure iommu->need_sync contains correct valueJoerg Roedel2011-10-031-3/+10
* iommu/amd: Don't take domain->lock recursivlyJoerg Roedel2011-10-031-5/+0
* ARM: davinci: fix cache flush build errorLinus Walleij2011-10-031-1/+5
* ARM: davinci: da850 EVM: read mac address from SPI flashSudhakar Rajashekhara2011-10-031-0/+28
* ARM: 7081/1: mach-integrator: fix the clocksourceLinus Walleij2011-10-031-3/+3
* xen/smp: Warn user why they keel over - nosmp or noapic and what to use instead.Konrad Rzeszutek Wilk2011-10-031-0/+10
* xen: x86_32: do not enable iterrupts when returning from exception in interru...Igor Mammedov2011-10-031-3/+5
* x86, perf: Check that current->mm is alive before getting user callchainAndrey Vagin2011-10-031-0/+3
* MXC: iomux-v3: correct NO_PAD_CTRL definitionTroy Kisky2011-10-031-1/+1
* ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.Srinivas Kandagatla2011-10-031-1/+1
* sparc64: Only Panther cheetah+ chips have POPC.David S. Miller2011-10-031-2/+8
* sparc32,sun4d: Change IPI IRQ level to prevent collision between IPI and time...Kjetil Oftedal2011-10-031-1/+1
* sparc: fix array bounds error setting up PCIC NMI trapIan Campbell2011-10-031-2/+2
* sparc64: Set HAVE_C_RECORDMCOUNTDavid S. Miller2011-10-031-0/+1
* sparc: Allow handling signals when stack is corrupted.David S. Miller2011-10-038-233/+468
* sparc32: unbreak arch_write_unlock()Mikael Pettersson2011-10-031-2/+9
* sparc64: remove unnecessary macros from spinlock_64.hMikael Pettersson2011-10-031-6/+0
* arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear valueLiu Gang-B341822011-10-031-2/+3
* x86, UV: Remove UV delay in starting slave cpusJack Steiner2011-08-291-1/+0
* x86-32, vdso: On system call restart after SYSENTER, use int $0x80H. Peter Anvin2011-08-291-1/+1
* x86, olpc: Wait for last byte of EC command to be acceptedPaul Fox2011-08-291-2/+2
* xen: Do not enable PV IPIs when vector callback not presentStefano Stabellini2011-08-291-2/+2
* xen/x86: replace order-based range checking of M2P table by linear oneJan Beulich2011-08-293-8/+12
* x86, mtrr: lock stop machine during MTRR rendezvous sequenceSuresh Siddha2011-08-291-0/+23
* x86, intel, power: Correct the MSR_IA32_ENERGY_PERF_BIAS messageLen Brown2011-08-291-5/+5