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* Normalize config options for guest supportRusty Russell2007-10-232-12/+31
| | | | | | | | | | | | | 1) Group all the "guest OS" support options together, under a PARAVIRT_GUEST menu. 2) Make those options select CONFIG_PARAVIRT, as suggested by Andi. 3) Make kconfig help titles consistent. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Andi Kleen <ak@suse.de> Cc: Zach Amsden <zach@vmware.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Chris Wright <chrisw@sous-sol.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2007-10-222-4/+4
|\ | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6 * 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Blackfin arch: use KBUILD_CFLAGS and KBUILD_AFLAGS in Makefile Blackfin arch: Javier Herrer writes: fix building when icache and dcache is disabled
| * Blackfin arch: use KBUILD_CFLAGS and KBUILD_AFLAGS in MakefileBryan Wu2007-10-221-2/+2
| | | | | | | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
| * Blackfin arch: Javier Herrer writes: fix building when icache and dcache is ↵Mike Frysinger2007-10-221-2/+2
| | | | | | | | | | | | | | | | disabled Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* | Merge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6Linus Torvalds2007-10-229-151/+336
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6: [S390] 4level-fixup cleanup [S390] Cleanup page table definitions. [S390] Introduce follow_table in uaccess_pt.c [S390] Remove unused user_seg from thread structure. [S390] tlb flush fix. [S390] kernel: Fix dump on panic for DASDs under LPAR. [S390] struct class_device -> struct device conversion. [S390] cio: Fix incomplete commit for uevent suppression. [S390] cio: Use to_channelpath() for device to channel path conversion. [S390] Add per-cpu idle time / idle count sysfs attributes. [S390] Update default configuration.
| * | [S390] 4level-fixup cleanupMartin Schwidefsky2007-10-223-8/+37
| | | | | | | | | | | | | | | | | | Get independent from asm-generic/4level-fixup.h Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Cleanup page table definitions.Martin Schwidefsky2007-10-224-29/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | - De-confuse the defines for the address-space-control-elements and the segment/region table entries. - Create out of line functions for page table allocation / freeing. - Simplify get_shadow_xxx functions. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Introduce follow_table in uaccess_pt.cMartin Schwidefsky2007-10-221-63/+22
| | | | | | | | | | | | | | | | | | | | | Define and use follow_table inline in uaccess_pt.c to simplify the code. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Remove unused user_seg from thread structure.Martin Schwidefsky2007-10-221-2/+0
| | | | | | | | | | | | Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] tlb flush fix.Martin Schwidefsky2007-10-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current tlb flushing code for page table entries violates the s390 architecture in a small detail. The relevant section from the principles of operation (SA22-7832-02 page 3-47): "A valid table entry must not be changed while it is attached to any CPU and may be used for translation by that CPU except to (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page-table entry, or (3) make a change by means of a COMPARE AND SWAP AND PURGE instruction that purges the TLB." That means if one thread of a multithreaded applciation uses a vma while another thread does an unmap on it, the page table entries of that vma needs to get removed with IPTE, IDTE or CSP. In some strange and rare situations a cpu could check-stop (die) because a entry has been pushed out of the TLB that is still needed to complete a (milli-coded) instruction. I've never seen it happen with the current code on any of the supported machines, so right now this is a theoretical problem. But I want to fix it nevertheless, to avoid headaches in the futures. To get this implemented correctly without changing common code the primitives ptep_get_and_clear, ptep_get_and_clear_full and ptep_set_wrprotect need to use the IPTE instruction to invalidate the pte before the new pte value gets stored. If IPTE is always used for the three primitives three important operations will have a performace hit: fork, mprotect and exit_mmap. Time for some workarounds: * 1: ptep_get_and_clear_full is used in unmap_vmas to remove page tables entries in a batched tlb gather operation. If the mmu_gather context passed to unmap_vmas has been started with full_mm_flush==1 or if only one cpu is online or if the only user of a mm_struct is the current process then the fullmm indication in the mmu_gather context is set to one. All TLBs for mm_struct are flushed by the tlb_gather_mmu call. No new TLBs can be created while the unmap is in progress. In this case ptep_get_and_clear_full clears the ptes with a simple store. * 2: ptep_get_and_clear is used in change_protection to clear the ptes from the page tables before they are reentered with the new access flags. At the end of the update flush_tlb_range clears the remaining TLBs. In general the ptep_get_and_clear has to issue IPTE for each pte and flush_tlb_range is a nop. But if there is only one user of the mm_struct then ptep_get_and_clear uses simple stores to do the update and flush_tlb_range will flush the TLBs. * 3: Similar to 2, ptep_set_wrprotect is used in copy_page_range for a fork to make all ptes of a cow mapping read-only. At the end of of copy_page_range dup_mmap will flush the TLBs with a call to flush_tlb_mm. Check for mm->mm_users and if there is only one user avoid using IPTE in ptep_set_wrprotect and let flush_tlb_mm clear the TLBs. Overall for single threaded programs the tlb flush code now performs better, for multi threaded programs it is slightly worse. In particular exit_mmap() now does a single IDTE for the mm and then just frees every page cache reference and every page table page directly without a delay over the mmu_gather structure. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] kernel: Fix dump on panic for DASDs under LPAR.Michael Holzheu2007-10-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the ccw method is used to ipl the DASD dump record under LPAR. This mechanism is not reliable, which can cause dump failures. This fix now uses the diag 308 ipl method for all machines, which have diag308 subcode 5 and 4 support. Signed-off-by: Michael Holzheu <holzheu@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Add per-cpu idle time / idle count sysfs attributes.Heiko Carstens2007-10-222-3/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new sysfs entries per cpu: idle_count and idle_time. idle_count contains the number of times a cpu went into idle state. idle_time contains the time a cpu spent in idle state in microseconds. This can be used e.g. by powertop to tell how often idle state is entered and left. # cat /sys/devices/system/cpu/cpu0/idle_count 504 # cat /sys/devices/system/cpu/cpu0/idle_time 469734037 us Cc: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Update default configuration.Martin Schwidefsky2007-10-221-46/+85
| |/ | | | | | | Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | Merge branch 'master' of ↵Linus Torvalds2007-10-228-125/+87
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 * 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: ARRAY_SIZE() cleanup [SPARC64]: small Makefile cleanups [SPARC64]: Stop using __do_IRQ(). [SPARC64]: Update defconfig.
| * | [SPARC64]: ARRAY_SIZE() cleanupAlejandro Martinez Ruiz2007-10-221-2/+1
| | | | | | | | | | | | | | | Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: small Makefile cleanupsSam Ravnborg2007-10-223-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few trivial Makefile cleanups - dependencipes in head.o was all wrong - deleted - CMODEL_CFLAG was not used anywhere - NEW_GCC was then not used outside sparc64/Makefe - do not export it - FIXME seems not appropriate - all other put oprofile in drivers-y too - No reason to do -I. (and it still builds) Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: Stop using __do_IRQ().David S. Miller2007-10-223-50/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | Invoke the desc->handle_irq directly in the top-level dispatch, just like other sophisticated ports. This will allow us to decrease the cost of the MSI queue dispatch. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: Update defconfig.David S. Miller2007-10-211-59/+32
| |/ | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'master' of ↵Linus Torvalds2007-10-225-41/+95
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Enable restart support for lite5200 board [POWERPC] Add restart support for mpc52xx based platforms [POWERPC] Update device tree binding for mpc5200 gpt [POWERPC] Add mpc52xx_find_and_map_path(), refactor utility functions [POWERPC] bestcomm: Restrict bus prefetch bugfix to original mpc5200 silicon.
| * \ Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xxPaul Mackerras2007-10-235-41/+95
| |\ \ | | |/ | |/|
| | * [POWERPC] Enable restart support for lite5200 boardMarian Balakowicz2007-10-211-0/+4
| | | | | | | | | | | | | | | | | | | | | Use the watchdog timer to implement board restart support. Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * [POWERPC] Add restart support for mpc52xx based platformsMarian Balakowicz2007-10-211-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | Add common helper routines: mpc52xx_map_wdt() and mpc52xx_restart(). Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * [POWERPC] Update device tree binding for mpc5200 gptMarian Balakowicz2007-10-212-34/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 'fsl,' prefix to 'compatible' property for gpt nodes. Add 'fsl,' prefix to empty, GPT0 specific 'has-wdt' property. The fsl, prefix is being added to better match the convention of prefixing manufacturer specific properties and values with the vendors name. Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * [POWERPC] Add mpc52xx_find_and_map_path(), refactor utility functionsMarian Balakowicz2007-10-211-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | Add helper routine mpc52xx_find_and_map_path(). Extract common code to mpc52xx_map_node() and refactor mpc52xx_find_and_map(). Signed-off-by: Jan Wrobel <wrr@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * [POWERPC] bestcomm: Restrict bus prefetch bugfix to original mpc5200 silicon.Grant Likely2007-10-211-3/+6
| | | | | | | | | | | | | | | | | | Only the MPC5200 needs this bug fix. MPC5200B is okay. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-10-2219-288/+432
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] time: Make c0_compare_int_usable more bullet proof [MIPS] Kbuild: Use the new cc-cross-prefix feature. [MIPS] Fix include wrapper symbol to something sane. [MIPS] Malta: Delete dead code. [MIPS] time: Add GT641xx timer0 clockevent driver [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. [MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code. [MIPS] time: Fix calculation in clockevent_set_clock()
| * | | [MIPS] time: Make c0_compare_int_usable more bullet proofAtsushi Nemoto2007-10-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use write_c0_compare(read_c0_count()) to clear interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Kbuild: Use the new cc-cross-prefix feature.Ralf Baechle2007-10-222-20/+10
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Malta: Delete dead code.Ralf Baechle2007-10-221-13/+0
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] time: Add GT641xx timer0 clockevent driverYoichi Yuasa2007-10-226-22/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And make use of it for Cobalt. A few others such as the Malta could make use of it as well. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.Ralf Baechle2007-10-226-165/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM148 has 4 cores but there are also just 4 generic timers available so use the ZBbus cycle counter instead of it. In addition the ZBbus counter also offers a much higher resolution and 64-bit counting so I'm considering a later complete conversion to it once I figure out if all members of the Sibyte SOC family support it - the docs seem to agree but the headers files seem to disagree ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code.Ralf Baechle2007-10-222-64/+72
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] time: Fix calculation in clockevent_set_clock()Atsushi Nemoto2007-10-221-2/+2
| |/ / | | | | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | Merge branch 'sg' of git://git.kernel.dk/linux-2.6-blockLinus Torvalds2007-10-2224-68/+56
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'sg' of git://git.kernel.dk/linux-2.6-block: Add CONFIG_DEBUG_SG sg validation Change table chaining layout Update arch/ to use sg helpers Update swiotlb to use sg helpers Update net/ to use sg helpers Update fs/ to use sg helpers [SG] Update drivers to use sg helpers [SG] Update crypto/ to sg helpers [SG] Update block layer to use sg helpers [SG] Add helpers for manipulating SG entries
| * | | Update arch/ to use sg helpersJens Axboe2007-10-2223-67/+55
| | | | | | | | | | | | | | | | Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | | [SG] Update drivers to use sg helpersJens Axboe2007-10-221-1/+1
| |/ / | | | | | | | | | Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* | | kexec: add BSS to resource treeBernhard Walle2007-10-227-9/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the BSS to the resource tree just as kernel text and kernel data are in the resource tree. The main reason behind this is to avoid crashkernel reservation in that area. While it's not strictly necessary to have the BSS in the resource tree (the actual collision detection is done in the reserve_bootmem() function before), the usage of the BSS resource should be presented to the user in /proc/iomem just as Kernel data and Kernel code. Note: The patch currently is only implemented for x86 and ia64 (because efi_initialize_iomem_resources() has the same signature on i386 and ia64). [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Bernhard Walle <bwalle@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Cc: <linux-arch@vger.kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: Iommu floppy workaroundKeshavamurthy, Anil S2007-10-221-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This config option (DMAR_FLPY_WA) sets up 1:1 mapping for the floppy device so that the floppy device which does not use DMA api's will continue to work. Once the floppy driver starts using DMA api's this config option can be turn off or this patch can be yanked out of kernel at that time. [akpm@linux-foundation.org: cleanups, rename things, build fix] [jengelh@computergmbh.de: Kconfig fixes] Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: Iommu Gfx workaroundKeshavamurthy, Anil S2007-10-222-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we fix all the opensource gfx drivers to use the DMA api's, at that time we can yank this config options out. [jengelh@computergmbh.de: Kconfig fixes] Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: DMAR fault handling supportKeshavamurthy, Anil S2007-10-221-1/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MSI interrupt handler registrations and fault handling support for Intel-IOMMU hadrware. This patch enables the MSI interrupts for the DMA remapping units and in the interrupt handler read the fault cause and outputs the same on to the console. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: Intel IOMMU driverKeshavamurthy, Anil S2007-10-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Actual intel IOMMU driver. Hardware spec can be found at: http://www.intel.com/technology/virtualization This driver sets X86_64 'dma_ops', so hook into standard DMA APIs. In this way, PCI driver will get virtual DMA address. This change is transparent to PCI drivers. [akpm@linux-foundation.org: remove unneeded cast] [akpm@linux-foundation.org: build fix] [bunk@stusta.de: fix duplicate CONFIG_DMAR Makefile line] Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: clflush_cache_range now takes size paramKeshavamurthy, Anil S2007-10-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the size param for clflush_cache_range(). Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Intel IOMMU: DMAR detection and parsing logicKeshavamurthy, Anil S2007-10-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch supports the upcomming Intel IOMMU hardware a.k.a. Intel(R) Virtualization Technology for Directed I/O Architecture and the hardware spec for the same can be found here http://www.intel.com/technology/virtualization/index.htm FAQ! (questions from akpm, answers from ak) > So... what's all this code for? > > I assume that the intent here is to speed things up under Xen, etc? Yes in some cases, but not this code. That would be the Xen version of this code that could potentially assign whole devices to guests. I expect this to be only useful in some special cases though because most hardware is not virtualizable and you typically want an own instance for each guest. Ok at some point KVM might implement this too; i likely would use this code for this. > Do we > have any benchmark results to help us to decide whether a merge would be > justified? The main advantage for doing it in the normal kernel is not performance, but more safety. Broken devices won't be able to corrupt memory by doing random DMA. Unfortunately that doesn't work for graphics yet, for that need user space interfaces for the X server are needed. There are some potential performance benefits too: - When you have a device that cannot address the complete address range an IOMMU can remap its memory instead of bounce buffering. Remapping is likely cheaper than copying. - The IOMMU can merge sg lists into a single virtual block. This could potentially speed up SG IO when the device is slow walking SG lists. [I long ago benchmarked 5% on some block benchmark with an old MPT Fusion; but it probably depends a lot on the HBA] And you get better driver debugging because unexpected memory accesses from the devices will cause a trappable event. > > Does it slow anything down? It adds more overhead to each IO so yes. This patch: Add support for early detection and parsing of DMAR's (DMA Remapping) reported to OS via ACPI tables. DMA remapping(DMAR) devices support enables independent address translations for Direct Memory Access(DMA) from Devices. These DMA remapping devices are reported via ACPI tables and includes pci device scope covered by these DMA remapping device. For detailed info on the specification of "Intel(R) Virtualization Technology for Directed I/O Architecture" please see http://www.intel.com/technology/virtualization/index.htm Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | i386: paravirt boot sequenceRusty Russell2007-10-224-6/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch uses the updated boot protocol to do paravirtualized boot. If the boot version is >= 2.07, then it will do two things: 1. Check the bootparams loadflags to see if we should reload the segment registers and clear interrupts. This is appropriate for normal native boot and some paravirtualized environments, but inapproprate for others. 2. Check the hardware architecture, and dispatch to the appropriate kernel entrypoint. If the bootloader doesn't set this, then we simply do the normal boot sequence. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: H. Peter Anvin <hpa@zytor.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Andi Kleen <ak@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | update boot spec to 2.07Rusty Russell2007-10-221-0/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates for version 2.07 of the boot protocol. This includes: load_flags.KEEP_SEGMENTS- flag to request/inhibit segment reloads hardware_subarch - what subarchitecture we're booting under hardware_subarch_data - per-architecture data The intention of these changes is to make booting a paravirtualized kernel work via the normal Linux boot protocol. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: H. Peter Anvin <hpa@zytor.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Blackfin arch: update boards filesBryan Wu2007-10-211-1/+1
| | | | | | | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* | Blackfin arch: dma add some API and cleanup bf54x DMA definitionBryan Wu2007-10-222-0/+27
| | | | | | | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* | Blackfin arch: cleanup and promote the general purpose timers api to a core ↵Mike Frysinger2007-10-214-2/+274
| | | | | | | | | | | | | | | | blackfin component Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* | Blackfin arch: add a cheesy install targetMike Frysinger2007-10-222-0/+60
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* | Blackfin arch: add functions for converting between sclks and usecsMike Frysinger2007-10-211-1/+13
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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