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* KVM: Use CPU_DYING for disabling virtualizationAvi Kivity2007-07-161-2/+2
| | | | | | | | Only at the CPU_DYING stage can we be sure that no user process will be scheduled onto the cpu and oops when trying to use virtualization extensions. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Tune hotplug/suspend IPIsAvi Kivity2007-07-161-2/+2
| | | | | | | | | The hotplug IPIs can be called from the cpu on which we are currently running on, so use on_cpu(). Similarly, drop on_each_cpu() for the suspend/resume callbacks, as we're in atomic context here and only one cpu is up anyway. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Keep track of which cpus have virtualization enabledAvi Kivity2007-07-161-12/+33
| | | | | | | | By keeping track of which cpus have virtualization enabled, we prevent double-enable or double-disable during hotplug, which is a very fatal oops. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Clean up #includesAvi Kivity2007-07-164-20/+20
| | | | | | Remove unnecessary ones, and rearange the remaining in the standard order. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Remove kvmfs in favor of the anonymous inodes sourceAvi Kivity2007-07-161-132/+11
| | | | | | | | kvm uses a pseudo filesystem, kvmfs, to generate inodes, a job that the new anonymous inodes source does much better. Cc: Davide Libenzi <davidel@xmailserver.org> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: Reliably detect if SVM was disabled by BIOSJoerg Roedel2007-07-162-0/+9
| | | | | | | | | | This patch adds an implementation to the svm is_disabled function to detect reliably if the BIOS disabled the SVM feature in the CPU. This fixes the issues with kernel panics when loading the kvm-amd module on machines where SVM is available but disabled. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Remove unnecessary code in vmx_tlb_flush()Avi Kivity2007-07-161-1/+0
| | | | | | | | A vmexit implicitly flushes the tlb; the code is bogus. Noted by Shaohua Li. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fix Wrong tlb flush orderShaohua Li2007-07-161-1/+1
| | | | | | | Need to flush the tlb after updating a pte, not before. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Reinitialize the real-mode tss when entering real modeAvi Kivity2007-07-161-0/+4
| | | | | | | Protected mode code may have corrupted the real-mode tss, so re-initialize it when switching to real mode. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Avoid useless memory write when possibleLuca Tettamanti2007-07-161-2/+4
| | | | | | | | When writing to normal memory and the memory area is unchanged the write can be safely skipped, avoiding the costly kvm_mmu_pte_write. Signed-Off-By: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Fix x86 emulator writebackLuca Tettamanti2007-07-161-4/+5
| | | | | | | | | | | | | | | When the old value and new one are the same the emulator skips the write; this is undesirable when the destination is a MMIO area and the write shall be performed regardless of the previous value. This optimization breaks e.g. a Linux guest APIC compiled without X86_GOOD_APIC. Remove the check and perform the writeback stage in the emulation unless it's explicitly disabled (currently push and some 2 bytes instructions may disable the writeback). Signed-Off-By: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Add support for in-kernel pio handlersEddie Dong2007-07-162-1/+37
| | | | | | | Useful for the PIC and PIT. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Fix interrupt checking on lightweight exitGregory Haskins2007-07-161-3/+3
| | | | | | | | With kernel-injected interrupts, we need to check for interrupts on lightweight exits too. Signed-off-by: Gregory Haskins <ghaskins@novell.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Adds support for in-kernel mmio handlersGregory Haskins2007-07-162-12/+142
| | | | | Signed-off-by: Gregory Haskins <ghaskins@novell.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Implement emulation of instruction "ret" (opcode 0xc3)Nitin A Kamble2007-07-161-4/+8
| | | | | Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Implement emulation of "pop reg" instruction (opcode 0x58-0x5f)Nitin A Kamble2007-07-161-2/+15
| | | | | | | For use in real mode. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Ensure vcpu time stamp counter is monotonousAvi Kivity2007-07-161-0/+9
| | | | | | | | | | | | If the time stamp counter goes backwards, a guest delay loop can become infinite. This can happen if a vcpu is migrated to another cpu, where the counter has a lower value than the first cpu. Since we're doing an IPI to the first cpu anyway, we can use that to pick up the old tsc, and use that to calculate the adjustment we need to make to the tsc offset. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Initialize the BSP bit in the APIC_BASE msr correctlyAvi Kivity2007-07-162-6/+6
| | | | | | Needs to be set on vcpu 0 only. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Replace memset(<addr>, 0, PAGESIZE) with clear_page(<addr>)Shani Moideen2007-07-161-3/+3
| | | | | Signed-off-by: Shani Moideen <shani.moideen@wipro.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: Replace memset(<addr>, 0, PAGESIZE) with clear_page(<addr>)Shani Moideen2007-07-161-2/+2
| | | | | Signed-off-by: Shani Moideen <shani.moideen@wipro.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Flush remote tlbs when reducing shadow pte permissionsAvi Kivity2007-07-165-15/+84
| | | | | | | | | | | When a vcpu causes a shadow tlb entry to have reduced permissions, it must also clear the tlb on remote vcpus. We do that by: - setting a bit on the vcpu that requests a tlb flush before the next entry - if the vcpu is currently executing, we send an ipi to make sure it exits before we continue Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Keep an upper bound of initialized vcpusAvi Kivity2007-07-162-0/+6
| | | | | | | That way, we don't need to loop for KVM_MAX_VCPUS for a single vcpu vm. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Emulate hlt on real mode for IntelAvi Kivity2007-07-163-2/+12
| | | | | | | This has two use cases: the bios can't boot from disk, and guest smp bootstrap. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move duplicate halt handling code into kvm_main.cAvi Kivity2007-07-164-12/+14
| | | | | | Will soon have a thid user. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Enable guest smpAvi Kivity2007-07-161-1/+1
| | | | | | | As we don't support guest tlb shootdown yet, this is only reliable for real-mode guests. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Fix adding an smp virtual machine to the vm listAvi Kivity2007-07-161-3/+3
| | | | | | | If we add the vm once per vcpu, we corrupt the list if the guest has multiple vcpus. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Fix vcpu freeing for guest smpAvi Kivity2007-07-162-2/+17
| | | | | | | | A vcpu can pin up to four mmu shadow pages, which means the freeing loop will never terminate. Fix by first unpinning shadow pages on all vcpus, then freeing shadow pages. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Remove unnecessary initialization and checks in mark_page_dirty()Nguyen Anh Quynh2007-07-161-2/+2
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Replace C code with call to ARRAY_SIZE() macro.Robert P. J. Day2007-07-161-1/+1
| | | | | Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Lazy guest cr3 switchingAvi Kivity2007-07-164-21/+40
| | | | | | | | | Switch guest paging context may require us to allocate memory, which might fail. Instead of wiring up error paths everywhere, make context switching lazy and actually do the switch before the next guest entry, where we can return an error if allocation fails. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Remove unused large page markerAvi Kivity2007-07-162-3/+0
| | | | | | | This has not been used for some time, as the same information is available in the page header. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Don't cache guest access bits in the shadow page tableAvi Kivity2007-07-162-9/+0
| | | | | | | | | This was once used to avoid accessing the guest pte when upgrading the shadow pte from read-only to read-write. But usually we need to set the guest pte dirty or accessed bits anyway, so this wasn't really exploited. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Simpify accessed/dirty/present/nx bit handlingAvi Kivity2007-07-162-10/+2
| | | | | | | | Always set the accessed and dirty bit (since having them cleared causes a read-modify-write cycle), always set the present bit, and copy the nx bit from the guest. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Remove cr0.wp tricksAvi Kivity2007-07-161-11/+0
| | | | | | No longer needed as we do everything in one place. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Make setting shadow ptes atomic on i386Avi Kivity2007-07-163-4/+15
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Make shadow pte updates atomicAvi Kivity2007-07-161-17/+20
| | | | | | | | | | | With guest smp, a second vcpu might see partial updates when the first vcpu services a page fault. So delay all updates until we have figured out what the pte should look like. Note that on i386, this is still not completely atomic as a 64-bit write will be split into two on a 32-bit machine. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move shadow pte modifications from set_pte/set_pde to set_pde_common()Avi Kivity2007-07-161-2/+1
| | | | | | We want all shadow pte modifications in one place. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fold fix_write_pf() into set_pte_common()Avi Kivity2007-07-162-111/+68
| | | | | | | This prevents some work from being performed twice, and, more importantly, reduces the number of places where we modify shadow ptes. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fold fix_read_pf() into set_pte_common()Avi Kivity2007-07-162-28/+23
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Pass the guest pde to set_pte_commonAvi Kivity2007-07-161-14/+15
| | | | | | | We will need the accessed bit (in addition to the dirty bit) and also write access (for setting the dirty bit) in a future patch. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Move set_pte_common() to pte width dependent codeAvi Kivity2007-07-162-52/+52
| | | | | | In preparation of some modifications. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Simplify fetch() a little bitAvi Kivity2007-07-161-17/+17
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Use slab caches for shadow pages and their headersAvi Kivity2007-07-163-28/+41
| | | | | | Use slab caches instead of a simple custom list. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Use symbolic constants instead of magic numbersEddie Dong2007-07-161-1/+1
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Fix includesMarkus Rechberger2007-07-161-0/+2
| | | | | | | KVM compilation fails for some .configs. This fixes it. Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: implement wbinvdAvi Kivity2007-07-161-1/+3
| | | | | | Vista seems to trigger it. Signed-off-by: Avi Kivity <avi@qumranet.com>
* Use menuconfig objects II - KVM/VirtJan Engelhardt2007-07-161-2/+6
| | | | | | | | | | Make a "menuconfig" out of the Kconfig objects "menu, ..., endmenu", so that the user can disable all the options in that menu at once instead of having to disable each option separately. Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Avoid saving and restoring msr_efer on lightweight vmexitEddie Dong2007-07-163-21/+71
| | | | | | | | | | | | | | | | | | | MSR_EFER.LME/LMA bits are automatically save/restored by VMX hardware, KVM only needs to save NX/SCE bits at time of heavy weight VM Exit. But clearing NX bits in host envirnment may cause system hang if the host page table is using EXB bits, thus we leave NX bits as it is. If Host NX=1 and guest NX=0, we can do guest page table EXB bits check before inserting a shadow pte (though no guest is expecting to see this kind of gp fault). If host NX=0, we present guest no Execute-Disable feature to guest, thus no host NX=0, guest NX=1 combination. This patch reduces raw vmexit time by ~27%. Me: fix compile warnings on i386. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Cleanup redundant code in MSR setEddie Dong2007-07-161-2/+0
| | | | | Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Avoid saving and restoring msrs on lightweight vmexitEddie Dong2007-07-162-56/+76
| | | | | | | | | | | | In a lightweight exit (where we exit and reenter the guest without scheduling or exiting to userspace in between), we don't need various msrs on the host, and avoiding shuffling them around reduces raw exit time by 8%. i386 compile fix by Daniel Hecken <dh@bahntechnik.de>. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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