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* Revert "sfc: Use write-combining to reduce TX latency" and follow-upsBen Hutchings2011-10-031-11/+4
| | | | | | | | | | | | | | | | | | | | | [ Upstream commit 86c432ca5d6da90a26ac8d3e680f2268b502d9c5 ] This reverts commits 65f0b417dee94f779ce9b77102b7d73c93723b39, d88d6b05fee3cc78e5b0273eb58c31201dcc6b76, fcfa060468a4edcf776f0c1211d826d5de1668c1, 747df2258b1b9a2e25929ef496262c339c380009 and 867955f5682f7157fdafe8670804b9f8ea077bc7. Depending on the processor model, write-combining may result in reordering that the NIC will not tolerate. This typically results in a DMA error event and reset by the driver, logged as: sfc 0000:0e:00.0: eth2: TX DMA Q reports TX_EV_PKT_ERR. sfc 0000:0e:00.0: eth2: resetting (ALL) Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* sfc: Use rmb() to ensure reads occur in orderNeil Turton2011-04-121-0/+2
| | | | | | | | | | Enabling write-combining may also enable read reordering. The BIU is only guaranteed to read from a 128-bit CSR or 64-bit SRAM word when the host reads from its lowest address; otherwise the BIU may use the latched value. Therefore we need to reinstate the read memory barriers after the first read operation for each CSR or SRAM word. Signed-off-by; Ben Hutchings <bhutchings@solarflare.com>
* sfc: Use write-combining to reduce TX latencyBen Hutchings2011-03-041-4/+9
| | | | | | | | | | | | | | | Based on work by Neil Turton <nturton@solarflare.com> and Kieran Mansley <kmansley@solarflare.com>. The BIU has now been verified to handle 3- and 4-dword writes within a single 128-bit register correctly. This means we can enable write- combining and only insert write barriers between writes to distinct registers. This has been observed to save about 0.5 us when pushing a TX descriptor to an empty TX queue. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Update copyright datesBen Hutchings2011-02-281-1/+1
| | | | Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Remove locking from implementation of efx_writeo_paged()Ben Hutchings2010-12-061-1/+14
| | | | | | | | It is not necessary to serialise writes to the paged 128-bit registers. However, if we don't then we must always write the last dword separately, not as part of a qword write. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Add compile-time checks for correctness of paged register writesBen Hutchings2010-12-061-8/+23
| | | | Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Remove redundant memory barriers between MMIOsBen Hutchings2010-12-061-5/+0
| | | | Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Expand/correct comments on collector behaviour and function usageBen Hutchings2010-12-061-49/+49
| | | | | | | Document exactly which registers and functions have special behaviour, and why races on writes to descriptor pointers are safe. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
* sfc: Implement message level controlBen Hutchings2010-06-241-12/+18
| | | | | | | | | | | | | | | Replace EFX_ERR() with netif_err(), EFX_INFO() with netif_info(), EFX_LOG() with netif_dbg() and EFX_TRACE() and EFX_REGDUMP() with netif_vdbg(). Replace EFX_ERR_RL(), EFX_INFO_RL() and EFX_LOG_RL() using explicit calls to net_ratelimit(). Implement the ethtool operations to get and set message level flags, and add a 'debug' module parameter for the initial value. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Implement ethtool register dump operationBen Hutchings2010-06-241-0/+7
| | | | | | Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Rename register I/O header and functions used by both Falcon and SienaBen Hutchings2009-10-241-0/+256
While we're at it, use type suffixes of 'd', 'q' and 'o', consistent with register type names. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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