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| * | | spi/bfin_spi: fix resources leakageDaniel Mack2010-10-181-45/+75
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-order setup() a bit so we don't leak memory/dma/gpio resources upon errors. Also make sure we don't call kfree() twice on the same object. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | spi/atmel: typo in debug messageMatthias Brugger2010-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | This patches a typo in the debug message. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/fsl_spi: Fix compile errors when building on ppc64Kumar Gala2010-10-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get the following when building on ppc64 due to lack of include of <asm/io.h>: In file included from drivers/spi/spi_fsl_espi.c:25:0: drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_write_reg': drivers/spi/spi_fsl_lib.h:88:2: error: implicit declaration of function 'out_be32' drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_read_reg': drivers/spi/spi_fsl_lib.h:93:2: error: implicit declaration of function 'in_be32' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_remove': drivers/spi/spi_fsl_espi.c:571:2: error: implicit declaration of function 'iounmap' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_probe': drivers/spi/spi_fsl_espi.c:602:2: error: implicit declaration of function 'ioremap' drivers/spi/spi_fsl_espi.c:602:24: warning: assignment makes pointer from integer without a cast Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/atmel: let transfers through if not changing bits_per_wordMatthias Brugger2010-10-131-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bits_per_word option in spi_transfer are allowed if it does not change the csr register. This is necessary for the driver in drivers/staging/iio/adis16260_core.c, as it uses this option. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/topcliff: Fix uninitialized variable defectGrant Likely2010-10-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following build error introduced by commit 65308c46, "spi/topcliff: cleanup for style and conciseness". drivers/spi/spi_topcliff_pch.c: In function 'pch_spi_process_messages': drivers/spi/spi_topcliff_pch.c:752: warning: 'data' is used uninitialized in +this function Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/fsl_spi: add eSPI controller supportMingkai Hu2010-10-124-0/+761
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add eSPI controller support based on the library code spi_fsl_lib.c. The eSPI controller is newer controller 85xx/Pxxx devices supported. There're some differences comparing to the SPI controller: 1. Has different register map and different bit definition So leave the code operated the register to the driver code, not the common code. 2. Support 4 dedicated chip selects The software can't controll the chip selects directly, The SPCOM[CS] field is used to select which chip selects is used, and the SPCOM[TRANLEN] field is set to tell the controller how long the CS signal need to be asserted. So the driver doesn't need the chipselect related function when transfering data, just set corresponding register fields to controll the chipseclect. 3. Different Transmit/Receive FIFO access register behavior For SPI controller, the Tx/Rx FIFO access register can hold only one character regardless of the character length, but for eSPI controller, the register can hold 4 or 2 characters according to the character lengths. Access the Tx/Rx FIFO access register of the eSPI controller will shift out/in 4/2 characters one time. For SPI subsystem, the command and data are put into different transfers, so we need to combine all the transfers to one transfer in order to pass the transfer to eSPI controller. 4. The max transaction length limitation The max transaction length one time is limitted by the SPCOM[TRANSLEN] field which is 0xFFFF. When used mkfs.ext2 command to create ext2 filesystem on the flash, the read length will exceed the max value of the SPCOM[TRANSLEN] field. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/mpc8xxx: refactor the common code for SPI/eSPI controllerMingkai Hu2010-10-125-392/+522
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI controller code in the SPI controller driver spi_fsl_spi.c. Because the register map of the SPI controller and eSPI controller is so different, also leave the code operated the register to the driver code, not the common code. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/mpc8xxx: rename spi_mpc8xxx.c to spi_fsl_spi.cMingkai Hu2010-10-123-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will pave the way to refactor out the common code which can be used by the eSPI controller driver, and rename the SPI controller dirver to the file spi_fsl_spi.c. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | Merge commit 'v2.6.36-rc7' into spi/nextGrant Likely2010-10-123-3/+14
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| * | of/spi: Fix OF-style driver binding of spi devicesSinan Akman2010-10-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the OF hook to the spi core so that devices can automatically be registered based on device tree data. This fixes a problem with spi devices not binding to drivers after the cleanup of the spi & i2c binding code. Signed-off-by: Sinan Akman <sinan@writeme.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi: spi-gpio.c tests SPI_MASTER_NO_RX bit twice, but not SPI_MASTER_NO_TXRoel Kluin2010-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI_MASTER_NO_TX bit (can't do buffer write) wasn't tested. This code was introduced in commit 3c8e1a84 (spi/spi-gpio: add support for controllers without MISO or MOSI pin). This patch fixes a bug in choosing which transfer ops to use. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/mpc8xxx: fix buffer overrun on large transferschristophe leroy2010-09-161-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | It fixes an issue when sending-only or receiving-only more than PAGE_SIZE bytes. Signed-off-by: christophe leroy <christophe.leroy@c-s.fr> Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/pl022: fix dubious allocation staticize platform dataLinus Walleij2010-10-121-50/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes some dubious allocation of a local chipinfo struct in favor of a constant preset, tagging that one const revealed further problems with platform data being modified so fixed up these too. Reported-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/pl022: get rid of chipinfo dev pointerLinus Walleij2010-10-121-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | What is the dev pointer doing inside the platform data anyway. We have another pointer to the actual device at hand, use that. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/pl022: Add spi->mode support to AMBA SPI driverKevin Wells2010-10-121-68/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds spi->mode support for the AMBA pl022 driver and allows spidev to correctly alter SPI modes. Unused fields used in the pl022 header file for the pl022_config_chip have been removed. The ab8500 client driver selects the data transfer size instead of the platform data. For platforms that use the amba pl022 driver, the unused fields in the controller data structure have been removed and the .mode field in the SPI board info structure is used instead. Signed-off-by: Kevin Wells <wellsk40@gmail.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi: change to new flag variablematt mooney2010-10-121-3/+1
| | | | | | | | | | | | | | | | | | | | | Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/pl022: add PrimeCell generic DMA supportLinus Walleij2010-10-121-88/+428
| | | | | | | | | | | | | | | | | | | | | | | | | | | This extends the PL022 SSP/SPI driver with generic DMA engine support using the PrimeCell DMA engine interface. Also fix up the test code for the U300 platform. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/topcliff: Tidy up Kconfig help textGrant Likely2010-10-121-4/+3
| | | | | | | | | | | | | | | | | | The original didn't specify Topcliff in the config prompt text. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/topcliff: cleanups for style and concisenessGrant Likely2010-10-121-364/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes multiple cleanups to the new topcliff pch spi driver including, but not limited to, - removing superfluous brackets around variables - open coding functions that are only used once - removing unnecessary line breaks - removing unused functions - simplifying the interrupt enable/disable code - remove unnecessary (void *) casts. - remove b_mem_fail from pch_spi_set_tx to code it more cleanly - shorten dev_dbg() messages for conciseness and readability More cleanups are still needed in this driver. In particular, - the driver filename should be changed to spi_topcliff_pch.c - many of the dev_dbg() lines should be trimmed (particularly the ones on unconditional code paths). - I suspect that the locking model not correct. I'd like to know what drivers' critical regions are, and how they are protected. - get_resources and release_resources probably should be open coded in .probe and .release respectively. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/topcliff: Add topcliff platform controller hub (PCH) spi bus driverMasayuki Ohtake2010-10-083-0/+1538
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platform. All IO peripherals in Topcliff PCH are actually devices sitting on AMBA bus. This patch adds a driver for the SPI bus integrated into the Topcliff device. Signed-off-by: Masayuki Ohtake <masa-korg@dsn.okisemi.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/s3c64xx: Correction for 16,32 bits bus widthJassi Brar2010-09-291-15/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | We can't do without setting channel and bus width to same size. In order to do that, use loop read/writes in polling mode and appropriate burst size in DMA mode. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/s3c64xx: Consider the clk_from_cmu flagJassi Brar2010-09-291-38/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | Newer SoCs have the SPI clock scaling control in platform's clock management unit. Inorder for such SoCs to work, we need to check the flag clk_from_cmu before making any clock changes. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/s3c64xx: Prevent unnecessary map-unmapJassi Brar2010-09-291-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Since we use DMA mode only for xfers bigger than FIFO size, do not map/unmap buffers for polling mode transfers. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/amba-pl022: Fix error case return statement.Julia Lawall2010-09-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The return -EINVAL appears to only make sense if the if branch that it is aligned with is taken, and the indentation indicates that this is the authors intent, so move it into that branch. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable braces4@ position p1,p2; statement S1,S2; @@ ( if (...) { ... } | if (...) S1@p1 S2@p2 ) @script:python@ p1 << r.p1; p2 << r.p2; @@ if (p1[0].column == p2[0].column): cocci.print_main("branch",p1) cocci.print_secs("after",p2) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/orion: Drop unnecessary null testJulia Lawall2010-09-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | list_for_each_entry binds its first argument to a non-null value, and thus any null test on the value of that argument is superfluous. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ iterator I; expression x,E; @@ I(x,...) { <... - (x != NULL) && E ...> } // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi: omap2_mcspi: make use of dev_vdbg()Felipe Balbi2010-09-291-27/+9
|/ / | | | | | | | | | | | | | | | | dev_vdbg() is only compiled when VERBOSE is defined, so there's no need to wrap dev_dbg() on #ifdef VERBOSE .. #endif as we can use dev_vdbg() directly. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/pl022: move probe call to subsys_initcall()Linus Walleij2010-09-081-1/+1
| | | | | | | | | | | | | | | | | | The PL022 SPI bus is sometimes used for early stuff like regulators that need to be present at module_init() time, so we move this to a subsys_initcall(). Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/pl022: fix APB pclk power regression on U300Linus Walleij2010-09-081-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of an AMBA PrimeCell per-cell block clock, the pclk was left on after probe() unless explicitly disabled. This clock is wired to the same clock on PL022 causing it to stay always on since. Fix this up properly by clocking the pclk whenever we want to write into any PL022 registers and clocking the external clock whenever we want to transmit messages on the bus. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Tested-by : Kevin Wells <wellsk40@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/spi_s3c64xx: Warn if PIO transfers time outMark Brown2010-09-081-0/+6
| | | | | | | | | | | | | | | | | | | | When using PIO we have a timeout for the TX and RX FIFOs to ensure that the data actually gets transferred. Warn if we hit that timeout - it should never happen, but this makes sure we'll find out if it does. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/s3c64xx: Fix incorrect reuse of 'val' local variable.Jassi Brar2010-09-081-2/+3
| | | | | | | | | | | | | | | | Instead of, wrongly, reusing the 'val' variable, use a dedicated one for reading the status register. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/s3c64xx: Fix compilation warningJassi Brar2010-09-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | Fix compilation warning by typecasting the tx_buf pointer. [I'm not thrilled with resorting to a cast; but I cannot see a better way to go about this. I don't want to drop the const from struct spi_transfer ~~glikely] Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/dw_spi: clean the cs_control codeFeng Tang2010-09-081-12/+5
| | | | | | | | | | | | | | | | | | | | | | commit 052dc7c45i "spi/dw_spi: conditional transfer mode change" introduced cs_control code, which has a bug by using bit offset for spi mode to set transfer mode in control register. Also it forces devices who don't need cs_control to re-configure the control registers for each spi transfer. This patch will fix them Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/dw_spi: Allow interrupt sharingYong Wang2010-09-081-1/+6
| | | | | | | | | | | | | | | | Allow interrupt sharing since exclusive interrupt line for DW SPI controller is not provided on every platform. Signed-off-by: Yong Wang <yong.y.wang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/spi_s3c64xx: Increase dead reckoning time in wait_for_xfer()Mark Brown2010-09-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | For small transfers at high speeds the expected transfer time can easily be well under 1ms, causing the delay in wait_for_xfer() to be only the dead reckoning fudge factor of 5ms currently included. Experiments on some of my systems shows that this is marginal for some transfers so double it to 10ms. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/spi_s3c64xx: Move to subsys_initcall()Mark Brown2010-09-081-1/+1
| | | | | | | | | | | | | | | | | | Allow the use of the S3C64xx SPI controller with things like PMICs by moving the init up to subsys_initcall(). Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi: free children in spi_unregister_master, not siblingsDavid Lamparter2010-09-011-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | introduced by 49dce689 ("spi doesn't need class_device") and bad-fixed by 350d0076 ("spi: fix double-free on spi_unregister_master"), spi_unregister_master would previously device_unregister all of the spi master's siblings (instead of its children). hilarity ensues. fix it to unregister children. Signed-off-by: David Lamparter <equinox@diac24.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/spi_s3c64xx: Staticise non-exported functionsMark Brown2010-09-011-4/+4
| | | | | | | | | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/spi_s3c64xx: Make probe more robust against missing board configMark Brown2010-09-011-2/+7
|/ | | | | | | | | | | | The S3C64xx SPI driver requires the machine to call s3c64xx_spi_set_info() to select a few options, including the clock to use for the SPI controller. If this is not done then a NULL will be passed as the clock name for clk_get(), causing an obscure crash. Guard against this and other missing configuration by validating that the clock name has been filled in in the platform data that ets passed in. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* m68knommu: include sched.h in ColdFire/SPI driverGreg Ungerer2010-08-181-0/+1
| | | | | | | | | | | | | | | | Using the coldfire qspi driver, I get the following error: drivers/spi/coldfire_qspi.c: In function 'mcfqspi_irq_handler': drivers/spi/coldfire_qspi.c:166: error: 'TASK_NORMAL' undeclared (first use in this function) drivers/spi/coldfire_qspi.c:166: error: (Each undeclared identifier is reported only once It is solved by adding the following include to coldfire_sqpi.c: #include <linux/sched.h> Fix suggested by Jate Sujjavanich <jsujjavanich@syntech-fuelmaster.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2010-08-1411-99/+325
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: spi/amba_pl022: Fix probe and remove hook section annotations. spi/mpc5121: change annotations for probe and remove functions spi/bitbang: reinitialize transfer parameters for every message spi/spi-gpio: add support for controllers without MISO or MOSI pin spi/bitbang: add support for SPI_MASTER_NO_{TX, RX} modes SPI100k: Fix 8-bit and RX-only transfers spi/mmc_spi: mmc_spi adaptations for SPI bus locking API spi/mmc_spi: SPI bus locking API, using mutex Fix trivial conflict in drivers/spi/mpc512x_psc_spi.c due to 'struct of_device' => 'struct platform_device' rename and __init/__exit to __devinit/__devexit fix.
| * spi/amba_pl022: Fix probe and remove hook section annotations.Kevin Wells2010-08-011-3/+3
| | | | | | | | | | | | | | | | | | | | Probe and remove hooks belong in the __devinit and __devexit sections respectively. This patch fixes incorrect annotations on the pl022 spi driver. Signed-off-by: Kevin Wells <wellsk40@gmail.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * Merge commit 'v2.6.35-rc6' into spi/testGrant Likely2010-07-251-22/+0
| |\
| * | spi/mpc5121: change annotations for probe and remove functionsAnatolij Gustschin2010-07-051-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Change annotations from __init/__exit to __devinit/__devexit to get rid of section mismatch warning. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/bitbang: reinitialize transfer parameters for every messageBrian Niebuhr2010-07-031-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the setup_transfer logic to account for the case where multiple messages to different SPI devices are in the queue simultaneously. With the current logic, the second message in the queue will end up using the transfer parameters for the previous message in the queue. The fix is to reinitialize the transfer parameters for each message rather than only once on the first message. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/spi-gpio: add support for controllers without MISO or MOSI pinMarek Szyprowski2010-07-031-18/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some boards that do not strictly follow SPI standard and use only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary chips and controls them with GPIO based 'spi controller'. In this configuration the MISO or MOSI line is missing (it is not required if the chip does not transfer any data back to host or host only reads data from chip). This patch adds support for such non-standard configuration in GPIO-based SPI controller. It has been tested in configuration without MISO pin. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/bitbang: add support for SPI_MASTER_NO_{TX, RX} modesMarek Szyprowski2010-07-036-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new flags argument to bitbang_txrx_be_cpha0 and bitbang_txrx_be_cpha1 transfer functions. This enables support for SPI_MASTER_NO_{TX,RX} transfer modes. The change should have no impact on speed of the existing drivers. bitbank_txrx_* functions are usually inlined into the drivers. When the argument is equal to constant zero, the optimizer would be able to eliminate the dead code (flags checks) easily. Tested on ARM and GCC 4.4.x and in all cases the checks were eliminated in the inlined function. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | SPI100k: Fix 8-bit and RX-only transfersCory Maccarrone2010-07-031-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change fixes 8-bit transfers and RX-only transfers. The SPI100k framework requires minimum 16-bit words to be written, so 8-bit transfers must be shited by 8 bits and sent out as a 16-bit word. Additionally, receive-only transfers were failing due to the perceived need to fill the TX buffer with something. This is in fact not needed. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/mmc_spi: SPI bus locking API, using mutexErnst Schwab2010-06-281-33/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI bus locking API to allow exclusive access to the SPI bus, especially, but not limited to, for the mmc_spi driver. Coded according to an outline from Grant Likely; here is his specification (accidentally swapped function names corrected): It requires 3 things to be added to struct spi_master. - 1 Mutex - 1 spin lock - 1 flag. The mutex protects spi_sync, and provides sleeping "for free" The spinlock protects the atomic spi_async call. The flag is set when the lock is obtained, and checked while holding the spinlock in spi_async(). If the flag is checked, then spi_async() must fail immediately. The current runtime API looks like this: spi_async(struct spi_device*, struct spi_message*); spi_sync(struct spi_device*, struct spi_message*); The API needs to be extended to this: spi_async(struct spi_device*, struct spi_message*) spi_sync(struct spi_device*, struct spi_message*) spi_bus_lock(struct spi_master*) /* although struct spi_device* might be easier */ spi_bus_unlock(struct spi_master*) spi_async_locked(struct spi_device*, struct spi_message*) spi_sync_locked(struct spi_device*, struct spi_message*) Drivers can only call the last two if they already hold the spi_master_lock(). spi_bus_lock() obtains the mutex, obtains the spin lock, sets the flag, and releases the spin lock before returning. It doesn't even need to sleep while waiting for "in-flight" spi_transactions to complete because its purpose is to guarantee no additional transactions are added. It does not guarantee that the bus is idle. spi_bus_unlock() clears the flag and releases the mutex, which will wake up any waiters. The difference between spi_async() and spi_async_locked() is that the locked version bypasses the check of the lock flag. Both versions need to obtain the spinlock. The difference between spi_sync() and spi_sync_locked() is that spi_sync() must hold the mutex while enqueuing a new transfer. spi_sync_locked() doesn't because the mutex is already held. Note however that spi_sync must *not* continue to hold the mutex while waiting for the transfer to complete, otherwise only one transfer could be queued up at a time! Almost no code needs to be written. The current spi_async() and spi_sync() can probably be renamed to __spi_async() and __spi_sync() so that spi_async(), spi_sync(), spi_async_locked() and spi_sync_locked() can just become wrappers around the common code. spi_sync() is protected by a mutex because it can sleep spi_async() needs to be protected with a flag and a spinlock because it can be called atomically and must not sleep Signed-off-by: Ernst Schwab <eschwab@online.de> [grant.likely@secretlab.ca: use spin_lock_irqsave()] Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Matt Fleming <matt@console-pimps.org> Tested-by: Antonio Ospite <ospite@studenti.unina.it>
* | | of/device: Replace struct of_device with struct platform_deviceGrant Likely2010-08-066-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_device is just an alias for platform_device, so remove it entirely. Also replace to_of_device() with to_platform_device() and update comment blocks. This patch was initially generated from the following semantic patch, and then edited by hand to pick up the bits that coccinelle didn't catch. @@ @@ -struct of_device +struct platform_device Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: David S. Miller <davem@davemloft.net>
* | | of/address: Clean up function declarationsGrant Likely2010-08-013-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the declaration of of_get_address(), of_get_pci_address(), and of_pci_address_to_resource() out of arch code and into the common linux/of_address header file. This patch also fixes some of the asm/prom.h ordering issues. It still includes some header files that it ideally shouldn't be, but at least the ordering is consistent now so that of_* overrides work. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
generated by cgit v1.1 at 2024-09-21 17:47:51 +0000