| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Blackfin arch: add missing implementations SIC_IWR crosses several registers | Michael Hennerich | 2007-06-21 | 1 | -3/+7 |
| * | Blackfin arch: initial supporting for BF548-EZKIT | Roy Huang | 2007-07-12 | 1 | -0/+3 |
| * | Blackfin arch: add missing braces around array bfin serial init | Mike Frysinger | 2007-06-21 | 1 | -0/+2 |
| * | Blackfin arch: update blackfin header files to latest one in VDSP. | Bryan Wu | 2007-05-21 | 1 | -55/+50 |
| * | Blackfin arch: Move write to VR_CTL closer to IDLE | Michael Hennerich | 2007-05-21 | 1 | -2/+4 |
| * | blackfin architecture | Bryan Wu | 2007-05-07 | 10 | -0/+4894 |
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