aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-x86/cpufeature.h
Commit message (Collapse)AuthorAgeFilesLines
* x86: add feature macros for the gbpages cpuid bitAndi Kleen2008-02-041-0/+2
| | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: unify CPU feature string namesH. Peter Anvin2008-02-041-3/+9
| | | | | | | | | | | Move the CPU feature string names to a separate file (common to 32 and 64 bits); additionally, make <asm/cpufeature.h> includable by host code in preparation for including the CPU feature strings in the boot code. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: convert TSC disabling to generic cpuid disable bitmapAndi Kleen2008-01-301-0/+4
| | | | | | | | Fix from: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add framework to disable CPUID bits on the command lineAndi Kleen2008-01-301-0/+4
| | | | | | | | | | There are already various options to disable specific cpuid bits on the command line. They all use their own variable. Add a generic mask to make this easier in the future. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: 64-bit, remove redundant cpu_has_ definitionsKyle McMartin2008-01-301-15/+0
| | | | | | | | | | PSE, PGE, XMM, XMM2, and FXSR are defined as required features, and will be optimized to a constant at compile time. Remove their redundant definitions. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: remove the now unused X86_FEATURE_SYNC_RDTSCAndi Kleen2008-01-301-1/+1
| | | | | | | | we need to know whether RDTSC is synchronous or not. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUsAndi Kleen2008-01-301-0/+1
| | | | | | | | | | | | | According to Intel RDTSC can be always synchronized with LFENCE on all current CPUs. Implement the necessary CPUID bit for that. It is unclear yet if that is true for all future CPUs too, but if there's another way the kernel can be always updated. Cc: asit.k.mallick@intel.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen2008-01-301-0/+1
| | | | | | | | | | According to AMD RDTSC can be synchronized through MFENCE. Implement the necessary CPUID bit for that. Cc: andreas.herrmann3@amd.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: x86-64 wired cpu_has macrosRoland McGrath2008-01-301-0/+12
| | | | | | | | | | | This adds hard-wired definitions for the remaining cpu_has_* macros that correspond to flags required-features.h demands are set for 64-bit. Using these can efficiently avoid some #ifdef's when merging 32-bit and 64-bit code together. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add set/clear_cpu_cap operationsJeremy Fitzhardinge2008-01-301-1/+4
| | | | | | | | | | | | | The patch to suppress bitops-related warnings added a pile of ugly casts. Many of these were related to the management of x86 CPU capabilities. Clean these up by adding specific set/clear_cpu_cap macros, and use them consistently. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: clean up bitops-related warningsJeremy Fitzhardinge2008-01-301-1/+1
| | | | | | | | | | Add casts to appropriate places to silence spurious bitops warnings. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cleanup tlbflush.h variantsThomas Gleixner2008-01-301-0/+9
| | | | | | | | | Bring the tlbflush.h variants into sync to prepare merging and paravirt support. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: unify asm/cpufeature.hH. Peter Anvin2008-01-301-4/+187
| | | | | | | | asm/cpufeature.h was already almost unified; this completes the job. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* i386/x86_64: move headers to include/asm-x86Thomas Gleixner2007-10-111-0/+5
Move the headers to include/asm-x86 and fixup the header install make rules Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
generated by cgit v1.1 at 2024-12-27 07:54:08 +0000