From 20e218a77fc0b0576817b6b204fe5b9391a5b209 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Wed, 8 Dec 2010 17:18:46 +0530 Subject: ux500: fix 5500 PER6 clock rate The DB5500 PER6 clock rate is the same as the DB8500 one, i.e. 133.33 MHz. Signed-off-by: Rabin Vincent Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/clock.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index 598902d..00e9ab3 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c @@ -578,7 +578,6 @@ int __init clk_init(void) /* Clock tree for U5500 not implemented yet */ clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; - clk_per6clk.rate = 26000000; clk_uartclk.rate = 36360000; clk_sdmmcclk.rate = 99900000; } -- cgit v1.1