From 499ba610c2829adafbf393c2f3773d73ae4445f3 Mon Sep 17 00:00:00 2001 From: Wolfgang Wiedmeyer Date: Fri, 23 Oct 2015 06:06:09 +0200 Subject: merge more graphics stuff from 3.2.72 --- arch/arm/mach-s3c64xx/Kconfig | 25 + arch/arm/mach-s3c64xx/Makefile | 8 +- arch/arm/mach-s3c64xx/Makefile.boot | 2 +- arch/arm/mach-s3c64xx/clock.c | 99 +- arch/arm/mach-s3c64xx/cpu.c | 28 +- arch/arm/mach-s3c64xx/cpufreq.c | 270 -- arch/arm/mach-s3c64xx/dev-audio.c | 1 + arch/arm/mach-s3c64xx/dev-onenand1.c | 55 - arch/arm/mach-s3c64xx/dev-spi.c | 1 + arch/arm/mach-s3c64xx/dev-uart.c | 60 +- arch/arm/mach-s3c64xx/dma.c | 12 +- arch/arm/mach-s3c64xx/gpiolib.c | 290 -- arch/arm/mach-s3c64xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-s3c64xx/include/mach/dma.h | 8 +- arch/arm/mach-s3c64xx/include/mach/gpio.h | 7 - arch/arm/mach-s3c64xx/include/mach/irqs.h | 35 +- arch/arm/mach-s3c64xx/include/mach/map.h | 9 +- arch/arm/mach-s3c64xx/include/mach/memory.h | 20 - arch/arm/mach-s3c64xx/include/mach/pll.h | 45 - arch/arm/mach-s3c64xx/include/mach/pm-core.h | 19 +- arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | 56 - arch/arm/mach-s3c64xx/include/mach/regs-fb.h | 21 - arch/arm/mach-s3c64xx/include/mach/regs-sys.h | 3 + arch/arm/mach-s3c64xx/include/mach/s3c6400.h | 36 - arch/arm/mach-s3c64xx/include/mach/s3c6410.h | 29 - arch/arm/mach-s3c64xx/irq.c | 37 +- arch/arm/mach-s3c64xx/mach-anw6410.c | 6 +- arch/arm/mach-s3c64xx/mach-hmt.c | 6 +- arch/arm/mach-s3c64xx/mach-mini6410.c | 14 +- arch/arm/mach-s3c64xx/mach-ncp.c | 6 +- arch/arm/mach-s3c64xx/mach-real6410.c | 14 +- arch/arm/mach-s3c64xx/mach-smartq5.c | 6 +- arch/arm/mach-s3c64xx/mach-smartq7.c | 6 +- arch/arm/mach-s3c64xx/mach-smdk6400.c | 4 +- arch/arm/mach-s3c64xx/mach-smdk6410.c | 90 +- arch/arm/mach-s3c64xx/pm.c | 7 +- arch/arm/mach-s3c64xx/s3c6400.c | 4 +- arch/arm/mach-s3c64xx/s3c6410.c | 4 +- arch/arm/mach-s3c64xx/setup-fb-24bpp.c | 3 +- arch/arm/mach-s3c64xx/setup-sdhci.c | 48 - arch/arm/mach-s3c64xx/sleep.S | 23 - arch/arm/mach-s5p64x0/Kconfig | 20 +- arch/arm/mach-s5p64x0/Makefile | 6 +- arch/arm/mach-s5p64x0/Makefile.boot | 2 +- arch/arm/mach-s5p64x0/clock-s5p6440.c | 84 +- arch/arm/mach-s5p64x0/clock-s5p6450.c | 78 +- arch/arm/mach-s5p64x0/cpu.c | 6 + arch/arm/mach-s5p64x0/dev-spi.c | 8 +- arch/arm/mach-s5p64x0/dma.c | 276 +- arch/arm/mach-s5p64x0/gpiolib.c | 7 +- arch/arm/mach-s5p64x0/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5p64x0/include/mach/dma.h | 4 +- arch/arm/mach-s5p64x0/include/mach/gpio.h | 7 - arch/arm/mach-s5p64x0/include/mach/irqs.h | 6 + arch/arm/mach-s5p64x0/include/mach/map.h | 4 + arch/arm/mach-s5p64x0/include/mach/memory.h | 19 - arch/arm/mach-s5p64x0/include/mach/pwm-clock.h | 68 - arch/arm/mach-s5p64x0/include/mach/regs-clock.h | 33 + arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 31 + arch/arm/mach-s5p64x0/mach-smdk6440.c | 116 +- arch/arm/mach-s5p64x0/mach-smdk6450.c | 115 +- arch/arm/mach-s5pc100/Kconfig | 3 +- arch/arm/mach-s5pc100/Makefile.boot | 2 +- arch/arm/mach-s5pc100/clock.c | 209 +- arch/arm/mach-s5pc100/dma.c | 324 +- arch/arm/mach-s5pc100/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pc100/include/mach/dma.h | 4 +- arch/arm/mach-s5pc100/include/mach/gpio.h | 7 - arch/arm/mach-s5pc100/include/mach/memory.h | 18 - arch/arm/mach-s5pc100/include/mach/pwm-clock.h | 56 - arch/arm/mach-s5pc100/include/mach/regs-fb.h | 105 - arch/arm/mach-s5pc100/mach-smdkc100.c | 63 +- arch/arm/mach-s5pc100/setup-fb-24bpp.c | 1 - arch/arm/mach-s5pc100/setup-sdhci.c | 42 - arch/arm/mach-s5pv210/Kconfig | 14 +- arch/arm/mach-s5pv210/Makefile | 3 +- arch/arm/mach-s5pv210/Makefile.boot | 2 +- arch/arm/mach-s5pv210/clock.c | 321 +- arch/arm/mach-s5pv210/cpu.c | 8 +- arch/arm/mach-s5pv210/cpufreq.c | 485 --- arch/arm/mach-s5pv210/dev-audio.c | 2 + arch/arm/mach-s5pv210/dma.c | 317 +- arch/arm/mach-s5pv210/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pv210/include/mach/dma.h | 4 +- arch/arm/mach-s5pv210/include/mach/gpio.h | 7 - arch/arm/mach-s5pv210/include/mach/irqs.h | 4 +- arch/arm/mach-s5pv210/include/mach/map.h | 16 + arch/arm/mach-s5pv210/include/mach/memory.h | 1 - arch/arm/mach-s5pv210/include/mach/pm-core.h | 3 + arch/arm/mach-s5pv210/include/mach/pwm-clock.h | 70 - arch/arm/mach-s5pv210/include/mach/regs-clock.h | 3 +- arch/arm/mach-s5pv210/include/mach/regs-fb.h | 21 - arch/arm/mach-s5pv210/mach-aquila.c | 4 +- arch/arm/mach-s5pv210/mach-goni.c | 71 +- arch/arm/mach-s5pv210/mach-smdkc110.c | 2 +- arch/arm/mach-s5pv210/mach-smdkv210.c | 64 +- arch/arm/mach-s5pv210/mach-torbreck.c | 2 +- arch/arm/mach-s5pv210/pm.c | 2 +- arch/arm/mach-s5pv210/setup-fb-24bpp.c | 1 - arch/arm/mach-s5pv210/setup-sdhci.c | 41 - arch/arm/mach-s5pv210/sleep.S | 73 - arch/arm/mach-sa1100/Makefile | 3 +- arch/arm/mach-sa1100/Makefile.boot | 7 +- arch/arm/mach-sa1100/assabet.c | 11 +- arch/arm/mach-sa1100/badge4.c | 5 +- arch/arm/mach-sa1100/collie.c | 1 + arch/arm/mach-sa1100/generic.c | 2 +- arch/arm/mach-sa1100/gpio.c | 65 - arch/arm/mach-sa1100/h3100.c | 2 +- arch/arm/mach-sa1100/h3600.c | 2 +- arch/arm/mach-sa1100/hackkit.c | 2 +- arch/arm/mach-sa1100/include/mach/debug-macro.S | 2 +- arch/arm/mach-sa1100/include/mach/gpio.h | 4 +- arch/arm/mach-sa1100/include/mach/hardware.h | 8 - arch/arm/mach-sa1100/include/mach/io.h | 6 +- arch/arm/mach-sa1100/include/mach/memory.h | 4 - arch/arm/mach-sa1100/include/mach/simpad.h | 94 +- arch/arm/mach-sa1100/jornada720.c | 6 +- arch/arm/mach-sa1100/lart.c | 2 +- arch/arm/mach-sa1100/leds-simpad.c | 100 - arch/arm/mach-sa1100/leds.c | 2 - arch/arm/mach-sa1100/leds.h | 1 - arch/arm/mach-sa1100/nanoengine.c | 2 +- arch/arm/mach-sa1100/pci-nanoengine.c | 7 +- arch/arm/mach-sa1100/pm.c | 8 +- arch/arm/mach-sa1100/shannon.c | 2 +- arch/arm/mach-sa1100/simpad.c | 215 +- arch/arm/mach-sa1100/sleep.S | 19 +- arch/arm/mach-spear3xx/Makefile.boot | 2 +- arch/arm/mach-spear3xx/include/mach/clkdev.h | 19 - arch/arm/mach-spear3xx/include/mach/memory.h | 19 - arch/arm/mach-spear3xx/spear300_evb.c | 2 +- arch/arm/mach-spear3xx/spear310_evb.c | 2 +- arch/arm/mach-spear3xx/spear320_evb.c | 2 +- arch/arm/mach-spear6xx/Makefile.boot | 2 +- arch/arm/mach-spear6xx/include/mach/clkdev.h | 19 - arch/arm/mach-spear6xx/include/mach/memory.h | 19 - arch/arm/mach-spear6xx/spear600_evb.c | 2 +- arch/arm/mach-tcc8k/Makefile.boot | 2 +- arch/arm/mach-tcc8k/board-tcc8000-sdk.c | 2 +- arch/arm/mach-u300/Kconfig | 49 +- arch/arm/mach-u300/Makefile | 2 +- arch/arm/mach-u300/Makefile.boot | 17 +- arch/arm/mach-u300/core.c | 199 +- arch/arm/mach-u300/i2c.c | 51 +- arch/arm/mach-u300/include/mach/debug-macro.S | 2 +- arch/arm/mach-u300/include/mach/gpio.h | 295 +- arch/arm/mach-u300/include/mach/irqs.h | 19 +- arch/arm/mach-u300/include/mach/memory.h | 27 +- arch/arm/mach-u300/include/mach/syscon.h | 136 - arch/arm/mach-u300/include/mach/u300-regs.h | 2 +- arch/arm/mach-u300/mmc.c | 18 +- arch/arm/mach-u300/padmux.c | 367 -- arch/arm/mach-u300/padmux.h | 39 - arch/arm/mach-u300/spi.c | 24 +- arch/arm/mach-u300/timer.c | 33 +- arch/arm/mach-u300/u300.c | 18 +- arch/arm/mach-ux500/Kconfig | 15 +- arch/arm/mach-ux500/Makefile | 3 +- arch/arm/mach-ux500/Makefile.boot | 2 +- arch/arm/mach-ux500/board-mop500-pins.c | 73 +- arch/arm/mach-ux500/board-mop500-regulators.c | 11 +- arch/arm/mach-ux500/board-mop500-sdi.c | 83 +- arch/arm/mach-ux500/board-mop500-u8500uib.c | 27 +- arch/arm/mach-ux500/board-mop500-uib.c | 2 +- arch/arm/mach-ux500/board-mop500.c | 211 +- arch/arm/mach-ux500/board-mop500.h | 8 + arch/arm/mach-ux500/board-u5500-sdi.c | 2 +- arch/arm/mach-ux500/board-u5500.c | 115 +- arch/arm/mach-ux500/clock.c | 79 +- arch/arm/mach-ux500/cpu-db5500.c | 3 +- arch/arm/mach-ux500/cpu-db8500.c | 2 +- arch/arm/mach-ux500/cpu.c | 123 +- arch/arm/mach-ux500/devices-common.c | 2 +- arch/arm/mach-ux500/hotplug.c | 2 +- arch/arm/mach-ux500/include/mach/clkdev.h | 7 - arch/arm/mach-ux500/include/mach/db5500-regs.h | 2 + arch/arm/mach-ux500/include/mach/db8500-regs.h | 3 + arch/arm/mach-ux500/include/mach/debug-macro.S | 2 +- arch/arm/mach-ux500/include/mach/gpio.h | 2 - arch/arm/mach-ux500/include/mach/memory.h | 18 - arch/arm/mach-ux500/include/mach/uncompress.h | 9 +- arch/arm/mach-ux500/pins-db8500.h | 142 +- arch/arm/mach-ux500/platsmp.c | 20 +- arch/arm/mach-ux500/usb.c | 1 + arch/arm/mach-vt8500/Makefile.boot | 2 +- arch/arm/mach-vt8500/bv07.c | 2 +- arch/arm/mach-vt8500/include/mach/debug-macro.S | 2 +- arch/arm/mach-vt8500/include/mach/gpio.h | 7 +- arch/arm/mach-vt8500/include/mach/io.h | 2 - arch/arm/mach-vt8500/include/mach/memory.h | 28 - arch/arm/mach-vt8500/wm8505_7in.c | 2 +- arch/arm/mach-w90x900/Makefile.boot | 2 +- arch/arm/mach-w90x900/cpu.c | 2 +- arch/arm/mach-w90x900/dev.c | 4 +- arch/arm/mach-w90x900/include/mach/clkdev.h | 7 - arch/arm/mach-w90x900/include/mach/entry-macro.S | 4 +- arch/arm/mach-w90x900/include/mach/gpio.h | 6 +- arch/arm/mach-w90x900/include/mach/memory.h | 23 - arch/arm/mach-w90x900/include/mach/mfp.h | 3 +- arch/arm/mach-w90x900/include/mach/nuc900_spi.h | 2 +- arch/arm/mach-w90x900/mach-nuc910evb.c | 1 - arch/arm/mach-w90x900/mach-nuc950evb.c | 1 - arch/arm/mach-w90x900/mach-nuc960evb.c | 1 - arch/arm/mach-w90x900/mfp.c | 48 +- arch/arm/plat-mxc/Kconfig | 52 +- arch/arm/plat-mxc/Makefile | 4 +- arch/arm/plat-mxc/audmux-v2.c | 18 +- arch/arm/plat-mxc/avic.c | 102 +- arch/arm/plat-mxc/cpu.c | 9 + arch/arm/plat-mxc/cpufreq.c | 3 +- arch/arm/plat-mxc/devices.c | 76 +- arch/arm/plat-mxc/devices/Kconfig | 9 +- arch/arm/plat-mxc/devices/Makefile | 3 + arch/arm/plat-mxc/devices/platform-fec.c | 22 +- arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c | 6 + arch/arm/plat-mxc/devices/platform-imx-dma.c | 204 +- arch/arm/plat-mxc/devices/platform-imx-fb.c | 1 + arch/arm/plat-mxc/devices/platform-imx-i2c.c | 9 +- arch/arm/plat-mxc/devices/platform-imx-keypad.c | 5 + arch/arm/plat-mxc/devices/platform-imx-ssi.c | 12 +- arch/arm/plat-mxc/devices/platform-imx-uart.c | 9 +- arch/arm/plat-mxc/devices/platform-ipu-core.c | 3 +- arch/arm/plat-mxc/devices/platform-mxc-ehci.c | 10 + arch/arm/plat-mxc/devices/platform-mxc-mmc.c | 1 + .../plat-mxc/devices/platform-sdhci-esdhc-imx.c | 29 +- arch/arm/plat-mxc/devices/platform-spi_imx.c | 12 +- arch/arm/plat-mxc/gpio.c | 361 -- arch/arm/plat-mxc/include/mach/clkdev.h | 7 - arch/arm/plat-mxc/include/mach/common.h | 75 +- arch/arm/plat-mxc/include/mach/debug-macro.S | 36 +- arch/arm/plat-mxc/include/mach/devices-common.h | 44 +- arch/arm/plat-mxc/include/mach/dma.h | 3 +- arch/arm/plat-mxc/include/mach/entry-macro.S | 61 +- arch/arm/plat-mxc/include/mach/esdhc.h | 25 +- arch/arm/plat-mxc/include/mach/gpio.h | 67 +- arch/arm/plat-mxc/include/mach/hardware.h | 47 +- arch/arm/plat-mxc/include/mach/i2c.h | 4 - arch/arm/plat-mxc/include/mach/io.h | 22 +- arch/arm/plat-mxc/include/mach/iomux-mx25.h | 2 +- arch/arm/plat-mxc/include/mach/iomux-mx3.h | 1 + arch/arm/plat-mxc/include/mach/iomux-mx51.h | 2270 +++++-------- arch/arm/plat-mxc/include/mach/iomux-mx53.h | 3527 +++++++------------- arch/arm/plat-mxc/include/mach/iomux-v1.h | 4 - arch/arm/plat-mxc/include/mach/iomux-v3.h | 1 + arch/arm/plat-mxc/include/mach/iomux.h | 26 - arch/arm/plat-mxc/include/mach/irqs.h | 31 +- arch/arm/plat-mxc/include/mach/memory.h | 58 - arch/arm/plat-mxc/include/mach/mx25.h | 5 + arch/arm/plat-mxc/include/mach/mx27.h | 14 - arch/arm/plat-mxc/include/mach/mx31.h | 14 - arch/arm/plat-mxc/include/mach/mx35.h | 2 +- arch/arm/plat-mxc/include/mach/mx3x.h | 18 +- arch/arm/plat-mxc/include/mach/mx51.h | 183 +- arch/arm/plat-mxc/include/mach/mx53.h | 55 +- arch/arm/plat-mxc/include/mach/mxc.h | 29 +- arch/arm/plat-mxc/include/mach/sdma.h | 8 +- arch/arm/plat-mxc/include/mach/system.h | 36 +- arch/arm/plat-mxc/include/mach/timex.h | 13 +- arch/arm/plat-mxc/include/mach/uncompress.h | 2 + arch/arm/plat-mxc/iomux-v1.c | 34 +- arch/arm/plat-mxc/irq-common.c | 28 +- arch/arm/plat-mxc/irq-common.h | 3 +- arch/arm/plat-mxc/pwm.c | 10 +- arch/arm/plat-mxc/system.c | 4 + arch/arm/plat-mxc/tzic.c | 122 +- arch/arm/plat-nomadik/Kconfig | 8 +- arch/arm/plat-nomadik/include/plat/gpio.h | 96 - arch/arm/plat-nomadik/include/plat/mtu.h | 47 +- arch/arm/plat-nomadik/include/plat/pincfg.h | 5 - arch/arm/plat-nomadik/include/plat/ste_dma40.h | 1 + arch/arm/plat-nomadik/timer.c | 138 +- arch/arm/plat-omap/Kconfig | 18 +- arch/arm/plat-omap/Makefile | 2 - arch/arm/plat-omap/clock.c | 52 +- arch/arm/plat-omap/counter_32k.c | 142 +- arch/arm/plat-omap/debug-devices.c | 3 +- arch/arm/plat-omap/debug-leds.c | 3 +- arch/arm/plat-omap/devices.c | 85 +- arch/arm/plat-omap/dmtimer.c | 871 +++-- arch/arm/plat-omap/i2c.c | 45 +- arch/arm/plat-omap/include/plat/clkdev.h | 13 - arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 + arch/arm/plat-omap/include/plat/clock.h | 8 +- arch/arm/plat-omap/include/plat/common.h | 39 +- arch/arm/plat-omap/include/plat/cpu.h | 142 +- arch/arm/plat-omap/include/plat/dma.h | 5 + arch/arm/plat-omap/include/plat/dmtimer.h | 362 +- arch/arm/plat-omap/include/plat/gpio.h | 40 +- arch/arm/plat-omap/include/plat/i2c.h | 6 +- arch/arm/plat-omap/include/plat/io.h | 37 +- arch/arm/plat-omap/include/plat/iommu.h | 78 +- arch/arm/plat-omap/include/plat/iommu2.h | 4 +- arch/arm/plat-omap/include/plat/iovmm.h | 30 +- arch/arm/plat-omap/include/plat/irqs.h | 19 +- arch/arm/plat-omap/include/plat/mcbsp.h | 282 +- arch/arm/plat-omap/include/plat/memory.h | 102 - arch/arm/plat-omap/include/plat/mmc.h | 19 +- arch/arm/plat-omap/include/plat/nand.h | 6 +- arch/arm/plat-omap/include/plat/omap-alsa.h | 123 - arch/arm/plat-omap/include/plat/omap-pm.h | 12 +- arch/arm/plat-omap/include/plat/omap4-keypad.h | 3 +- arch/arm/plat-omap/include/plat/omap_device.h | 34 +- arch/arm/plat-omap/include/plat/omap_hwmod.h | 40 +- arch/arm/plat-omap/include/plat/serial.h | 9 +- arch/arm/plat-omap/include/plat/uncompress.h | 9 +- arch/arm/plat-omap/io.c | 18 + arch/arm/plat-omap/iommu-debug.c | 418 --- arch/arm/plat-omap/iommu.c | 1102 ------ arch/arm/plat-omap/iopgtable.h | 102 - arch/arm/plat-omap/iovmm.c | 907 ----- arch/arm/plat-omap/mailbox.c | 1 + arch/arm/plat-omap/mcbsp.c | 931 +----- arch/arm/plat-omap/omap-pm-noop.c | 24 +- arch/arm/plat-omap/omap_device.c | 568 +++- arch/arm/plat-omap/sram.c | 100 +- arch/arm/plat-orion/common.c | 8 +- arch/arm/plat-orion/gpio.c | 6 +- arch/arm/plat-orion/include/plat/common.h | 6 +- arch/arm/plat-orion/include/plat/gpio.h | 10 +- arch/arm/plat-pxa/Makefile | 1 - arch/arm/plat-pxa/gpio.c | 338 -- arch/arm/plat-pxa/include/plat/gpio.h | 40 +- arch/arm/plat-pxa/include/plat/mfp.h | 2 +- arch/arm/plat-pxa/include/plat/pxa3xx_nand.h | 20 +- arch/arm/plat-pxa/include/plat/sdhci.h | 35 - arch/arm/plat-pxa/mfp.c | 4 +- arch/arm/plat-spear/clock.c | 7 +- arch/arm/plat-spear/include/plat/clkdev.h | 20 - arch/arm/plat-spear/include/plat/debug-macro.S | 2 +- arch/arm/plat-spear/include/plat/gpio.h | 25 +- arch/arm/plat-spear/include/plat/memory.h | 20 - arch/arm/plat-tcc/include/mach/clkdev.h | 7 - arch/arm/plat-tcc/include/mach/debug-macro.S | 2 +- arch/arm/plat-tcc/include/mach/memory.h | 18 - arch/arm/plat-versatile/platsmp.c | 2 +- drivers/barcode_emul/Makefile | 5 - drivers/barcode_emul/barcode_emul_ice4.c | 626 ---- drivers/barcode_emul/barcode_emul_ice4.h | 2042 ------------ drivers/gpu/drm/i2c/ch7006_drv.c | 2 + drivers/gpu/drm/i2c/sil164_drv.c | 2 + drivers/gpu/drm/i810/i810_drv.c | 2 + drivers/gpu/drm/i915/dvo_ch7017.c | 2 +- drivers/gpu/drm/i915/dvo_ch7xxx.c | 4 +- drivers/gpu/drm/i915/dvo_ivch.c | 6 +- drivers/gpu/drm/i915/dvo_sil164.c | 2 +- drivers/gpu/drm/i915/dvo_tfp410.c | 14 +- drivers/gpu/drm/i915/i915_debugfs.c | 330 +- drivers/gpu/drm/i915/i915_dma.c | 91 +- drivers/gpu/drm/i915/i915_drv.c | 191 +- drivers/gpu/drm/i915/i915_drv.h | 202 +- drivers/gpu/drm/i915/i915_gem.c | 406 ++- drivers/gpu/drm/i915/i915_gem_debug.c | 8 +- drivers/gpu/drm/i915/i915_gem_evict.c | 2 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 161 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 69 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 19 +- drivers/gpu/drm/i915/i915_irq.c | 158 +- drivers/gpu/drm/i915/i915_mem.c | 14 +- drivers/gpu/drm/i915/i915_reg.h | 241 +- drivers/gpu/drm/i915/i915_suspend.c | 21 +- drivers/gpu/drm/i915/i915_trace.h | 46 +- drivers/gpu/drm/i915/intel_acpi.c | 2 +- drivers/gpu/drm/i915/intel_bios.c | 214 +- drivers/gpu/drm/i915/intel_bios.h | 22 +- drivers/gpu/drm/i915/intel_crt.c | 20 +- drivers/gpu/drm/i915/intel_display.c | 2069 +++++++++--- drivers/gpu/drm/i915/intel_dp.c | 1113 ++++-- drivers/gpu/drm/i915/intel_drv.h | 63 +- drivers/gpu/drm/i915/intel_hdmi.c | 200 +- drivers/gpu/drm/i915/intel_i2c.c | 9 +- drivers/gpu/drm/i915/intel_lvds.c | 143 +- drivers/gpu/drm/i915/intel_modes.c | 2 + drivers/gpu/drm/i915/intel_opregion.c | 108 +- drivers/gpu/drm/i915/intel_overlay.c | 152 +- drivers/gpu/drm/i915/intel_panel.c | 124 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 521 ++- drivers/gpu/drm/i915/intel_ringbuffer.h | 17 +- drivers/gpu/drm/i915/intel_sdvo.c | 414 +-- drivers/gpu/drm/i915/intel_sdvo_regs.h | 558 ++-- drivers/gpu/drm/i915/intel_tv.c | 113 +- drivers/gpu/drm/mga/mga_drv.c | 2 + drivers/gpu/drm/mga/mga_warp.c | 1 + drivers/gpu/drm/nouveau/Makefile | 9 +- drivers/gpu/drm/nouveau/nouveau_acpi.c | 5 +- drivers/gpu/drm/nouveau/nouveau_backlight.c | 169 +- drivers/gpu/drm/nouveau/nouveau_bios.c | 347 +- drivers/gpu/drm/nouveau/nouveau_bios.h | 2 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 238 +- drivers/gpu/drm/nouveau/nouveau_channel.c | 183 +- drivers/gpu/drm/nouveau/nouveau_connector.c | 143 +- drivers/gpu/drm/nouveau/nouveau_crtc.h | 3 +- drivers/gpu/drm/nouveau/nouveau_display.c | 54 +- drivers/gpu/drm/nouveau/nouveau_dma.c | 7 +- drivers/gpu/drm/nouveau/nouveau_dp.c | 963 +++--- drivers/gpu/drm/nouveau/nouveau_drv.c | 64 +- drivers/gpu/drm/nouveau/nouveau_drv.h | 205 +- drivers/gpu/drm/nouveau/nouveau_encoder.h | 27 +- drivers/gpu/drm/nouveau/nouveau_fb.h | 1 + drivers/gpu/drm/nouveau/nouveau_fbcon.c | 26 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 34 +- drivers/gpu/drm/nouveau/nouveau_gem.c | 151 +- drivers/gpu/drm/nouveau/nouveau_i2c.c | 60 +- drivers/gpu/drm/nouveau/nouveau_irq.c | 2 +- drivers/gpu/drm/nouveau/nouveau_mem.c | 403 +-- drivers/gpu/drm/nouveau/nouveau_mm.c | 88 +- drivers/gpu/drm/nouveau/nouveau_mm.h | 6 +- drivers/gpu/drm/nouveau/nouveau_notifier.c | 20 +- drivers/gpu/drm/nouveau/nouveau_object.c | 102 +- drivers/gpu/drm/nouveau/nouveau_perf.c | 118 +- drivers/gpu/drm/nouveau/nouveau_pm.c | 100 +- drivers/gpu/drm/nouveau/nouveau_pm.h | 15 +- drivers/gpu/drm/nouveau/nouveau_reg.h | 11 +- drivers/gpu/drm/nouveau/nouveau_sgdma.c | 75 +- drivers/gpu/drm/nouveau/nouveau_state.c | 327 +- drivers/gpu/drm/nouveau/nouveau_temp.c | 17 +- drivers/gpu/drm/nouveau/nouveau_vm.c | 61 +- drivers/gpu/drm/nouveau/nouveau_vm.h | 4 +- drivers/gpu/drm/nouveau/nouveau_volt.c | 46 +- drivers/gpu/drm/nouveau/nv04_crtc.c | 17 +- drivers/gpu/drm/nouveau/nv04_display.c | 23 - drivers/gpu/drm/nouveau/nv04_graph.c | 22 +- drivers/gpu/drm/nouveau/nv04_instmem.c | 28 +- drivers/gpu/drm/nouveau/nv04_pm.c | 4 + drivers/gpu/drm/nouveau/nv04_timer.c | 84 +- drivers/gpu/drm/nouveau/nv10_graph.c | 15 +- drivers/gpu/drm/nouveau/nv20_graph.c | 13 +- drivers/gpu/drm/nouveau/nv40_graph.c | 112 +- drivers/gpu/drm/nouveau/nv40_mpeg.c | 311 -- drivers/gpu/drm/nouveau/nv50_crtc.c | 24 +- drivers/gpu/drm/nouveau/nv50_cursor.c | 18 - drivers/gpu/drm/nouveau/nv50_display.c | 86 +- drivers/gpu/drm/nouveau/nv50_evo.c | 10 +- drivers/gpu/drm/nouveau/nv50_fbcon.c | 10 +- drivers/gpu/drm/nouveau/nv50_gpio.c | 31 + drivers/gpu/drm/nouveau/nv50_graph.c | 128 +- drivers/gpu/drm/nouveau/nv50_grctx.c | 13 +- drivers/gpu/drm/nouveau/nv50_instmem.c | 8 +- drivers/gpu/drm/nouveau/nv50_mpeg.c | 2 +- drivers/gpu/drm/nouveau/nv50_pm.c | 8 +- drivers/gpu/drm/nouveau/nv50_sor.c | 40 +- drivers/gpu/drm/nouveau/nv50_vm.c | 2 +- drivers/gpu/drm/nouveau/nv50_vram.c | 43 +- drivers/gpu/drm/nouveau/nv84_crypt.c | 2 +- drivers/gpu/drm/nouveau/nva3_copy.c | 2 +- drivers/gpu/drm/nouveau/nva3_copy.fuc | 4 +- drivers/gpu/drm/nouveau/nva3_copy.fuc.h | 94 +- drivers/gpu/drm/nouveau/nva3_pm.c | 402 ++- drivers/gpu/drm/nouveau/nvc0_copy.c | 8 +- drivers/gpu/drm/nouveau/nvc0_copy.fuc.h | 87 +- drivers/gpu/drm/nouveau/nvc0_fb.c | 95 +- drivers/gpu/drm/nouveau/nvc0_fbcon.c | 14 +- drivers/gpu/drm/nouveau/nvc0_fifo.c | 6 +- drivers/gpu/drm/nouveau/nvc0_graph.c | 350 +- drivers/gpu/drm/nouveau/nvc0_graph.h | 25 +- drivers/gpu/drm/nouveau/nvc0_grctx.c | 275 +- drivers/gpu/drm/nouveau/nvc0_instmem.c | 14 +- drivers/gpu/drm/nouveau/nvc0_vm.c | 6 +- drivers/gpu/drm/nouveau/nvc0_vram.c | 60 +- drivers/gpu/drm/r128/r128_cce.c | 1 + drivers/gpu/drm/r128/r128_drv.c | 2 + drivers/gpu/drm/radeon/Makefile | 3 +- drivers/gpu/drm/radeon/atom.c | 3 + drivers/gpu/drm/radeon/atombios.h | 929 +++++- drivers/gpu/drm/radeon/atombios_crtc.c | 197 +- drivers/gpu/drm/radeon/atombios_dp.c | 45 +- drivers/gpu/drm/radeon/evergreen.c | 358 +- drivers/gpu/drm/radeon/evergreen_blit_kms.c | 364 +- drivers/gpu/drm/radeon/evergreen_cs.c | 286 +- drivers/gpu/drm/radeon/evergreen_reg.h | 32 + drivers/gpu/drm/radeon/evergreend.h | 83 + drivers/gpu/drm/radeon/ni.c | 75 +- drivers/gpu/drm/radeon/r100.c | 169 +- drivers/gpu/drm/radeon/r100_track.h | 110 +- drivers/gpu/drm/radeon/r300.c | 124 +- drivers/gpu/drm/radeon/r300_cmdbuf.c | 2 +- drivers/gpu/drm/radeon/r420.c | 10 +- drivers/gpu/drm/radeon/r520.c | 9 +- drivers/gpu/drm/radeon/r600.c | 278 +- drivers/gpu/drm/radeon/r600_blit.c | 24 +- drivers/gpu/drm/radeon/r600_blit_kms.c | 361 +- drivers/gpu/drm/radeon/r600_cp.c | 25 +- drivers/gpu/drm/radeon/r600_cs.c | 79 +- drivers/gpu/drm/radeon/r600_hdmi.c | 4 +- drivers/gpu/drm/radeon/r600d.h | 24 + drivers/gpu/drm/radeon/radeon.h | 246 +- drivers/gpu/drm/radeon/radeon_acpi.c | 11 +- drivers/gpu/drm/radeon/radeon_asic.c | 32 +- drivers/gpu/drm/radeon/radeon_asic.h | 16 +- drivers/gpu/drm/radeon/radeon_atombios.c | 352 +- drivers/gpu/drm/radeon/radeon_atpx_handler.c | 55 +- drivers/gpu/drm/radeon/radeon_benchmark.c | 245 +- drivers/gpu/drm/radeon/radeon_bios.c | 164 +- drivers/gpu/drm/radeon/radeon_clocks.c | 4 +- drivers/gpu/drm/radeon/radeon_combios.c | 188 +- drivers/gpu/drm/radeon/radeon_connectors.c | 167 +- drivers/gpu/drm/radeon/radeon_cp.c | 4 +- drivers/gpu/drm/radeon/radeon_cs.c | 31 +- drivers/gpu/drm/radeon/radeon_cursor.c | 28 +- drivers/gpu/drm/radeon/radeon_device.c | 53 +- drivers/gpu/drm/radeon/radeon_display.c | 110 +- drivers/gpu/drm/radeon/radeon_drv.c | 5 +- drivers/gpu/drm/radeon/radeon_encoders.c | 2143 +----------- drivers/gpu/drm/radeon/radeon_fence.c | 6 +- drivers/gpu/drm/radeon/radeon_gart.c | 87 +- drivers/gpu/drm/radeon/radeon_i2c.c | 89 +- drivers/gpu/drm/radeon/radeon_irq.c | 2 +- drivers/gpu/drm/radeon/radeon_irq_kms.c | 14 +- drivers/gpu/drm/radeon/radeon_kms.c | 19 +- drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 34 +- drivers/gpu/drm/radeon/radeon_legacy_tv.c | 2 +- drivers/gpu/drm/radeon/radeon_mem.c | 3 +- drivers/gpu/drm/radeon/radeon_mode.h | 19 +- drivers/gpu/drm/radeon/radeon_object.c | 79 +- drivers/gpu/drm/radeon/radeon_object.h | 42 +- drivers/gpu/drm/radeon/radeon_pm.c | 24 +- drivers/gpu/drm/radeon/radeon_reg.h | 2 +- drivers/gpu/drm/radeon/radeon_ring.c | 41 + drivers/gpu/drm/radeon/radeon_state.c | 16 +- drivers/gpu/drm/radeon/radeon_test.c | 34 +- drivers/gpu/drm/radeon/radeon_ttm.c | 23 + drivers/gpu/drm/radeon/reg_srcs/cayman | 2 + drivers/gpu/drm/radeon/reg_srcs/evergreen | 3 + drivers/gpu/drm/radeon/reg_srcs/r600 | 1 + drivers/gpu/drm/radeon/rs400.c | 17 +- drivers/gpu/drm/radeon/rs600.c | 41 +- drivers/gpu/drm/radeon/rs690.c | 19 +- drivers/gpu/drm/radeon/rv515.c | 9 +- drivers/gpu/drm/radeon/rv770.c | 115 +- drivers/gpu/drm/radeon/rv770d.h | 3 + drivers/gpu/drm/savage/savage_drv.c | 2 + drivers/gpu/drm/sis/sis_drv.c | 2 + drivers/gpu/drm/sis/sis_drv.h | 4 +- drivers/gpu/drm/tdfx/tdfx_drv.c | 2 + drivers/gpu/drm/ttm/Makefile | 4 - drivers/gpu/drm/ttm/ttm_agp_backend.c | 109 +- drivers/gpu/drm/ttm/ttm_bo.c | 197 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 32 +- drivers/gpu/drm/ttm/ttm_bo_vm.c | 20 +- drivers/gpu/drm/ttm/ttm_memory.c | 14 +- drivers/gpu/drm/ttm/ttm_object.c | 5 +- drivers/gpu/drm/ttm/ttm_page_alloc.c | 245 +- drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 1134 ------- drivers/gpu/drm/ttm/ttm_tt.c | 331 +- drivers/gpu/drm/via/via_drv.c | 2 + drivers/gpu/drm/vmwgfx/Kconfig | 9 +- drivers/gpu/drm/vmwgfx/Makefile | 3 +- drivers/gpu/drm/vmwgfx/svga3d_reg.h | 259 +- drivers/gpu/drm/vmwgfx/svga_escape.h | 2 +- drivers/gpu/drm/vmwgfx/svga_overlay.h | 22 +- drivers/gpu/drm/vmwgfx/svga_reg.h | 304 +- drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c | 73 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 331 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 244 +- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 892 ++++- drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 80 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 1116 ++++++- drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 167 +- drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c | 101 +- drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c | 46 +- drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 273 +- drivers/gpu/drm/vmwgfx/vmwgfx_irq.c | 187 +- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 1447 ++++++-- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 55 +- drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 332 +- drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 191 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 1139 ++++++- drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c | 5 +- 568 files changed, 26592 insertions(+), 31415 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/cpufreq.c delete mode 100644 arch/arm/mach-s3c64xx/dev-onenand1.c delete mode 100644 arch/arm/mach-s3c64xx/gpiolib.c delete mode 100644 arch/arm/mach-s3c64xx/include/mach/memory.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/pll.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/pwm-clock.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-fb.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/s3c6400.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/s3c6410.h delete mode 100644 arch/arm/mach-s5p64x0/include/mach/memory.h delete mode 100644 arch/arm/mach-s5p64x0/include/mach/pwm-clock.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/memory.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/pwm-clock.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/regs-fb.h delete mode 100644 arch/arm/mach-s5pv210/cpufreq.c delete mode 100644 arch/arm/mach-s5pv210/include/mach/pwm-clock.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-fb.h delete mode 100644 arch/arm/mach-s5pv210/sleep.S delete mode 100644 arch/arm/mach-sa1100/gpio.c delete mode 100644 arch/arm/mach-sa1100/leds-simpad.c delete mode 100644 arch/arm/mach-spear3xx/include/mach/clkdev.h delete mode 100644 arch/arm/mach-spear3xx/include/mach/memory.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/clkdev.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/memory.h delete mode 100644 arch/arm/mach-u300/padmux.c delete mode 100644 arch/arm/mach-u300/padmux.h delete mode 100644 arch/arm/mach-ux500/include/mach/clkdev.h delete mode 100644 arch/arm/mach-ux500/include/mach/memory.h delete mode 100644 arch/arm/mach-vt8500/include/mach/memory.h delete mode 100644 arch/arm/mach-w90x900/include/mach/clkdev.h delete mode 100644 arch/arm/mach-w90x900/include/mach/memory.h delete mode 100644 arch/arm/plat-mxc/gpio.c delete mode 100644 arch/arm/plat-mxc/include/mach/clkdev.h delete mode 100644 arch/arm/plat-mxc/include/mach/iomux.h delete mode 100644 arch/arm/plat-mxc/include/mach/memory.h delete mode 100644 arch/arm/plat-nomadik/include/plat/gpio.h delete mode 100644 arch/arm/plat-omap/include/plat/clkdev.h delete mode 100644 arch/arm/plat-omap/include/plat/memory.h delete mode 100644 arch/arm/plat-omap/include/plat/omap-alsa.h delete mode 100644 arch/arm/plat-omap/iommu-debug.c delete mode 100644 arch/arm/plat-omap/iommu.c delete mode 100644 arch/arm/plat-omap/iopgtable.h delete mode 100644 arch/arm/plat-omap/iovmm.c delete mode 100644 arch/arm/plat-pxa/gpio.c delete mode 100644 arch/arm/plat-pxa/include/plat/sdhci.h delete mode 100644 arch/arm/plat-spear/include/plat/clkdev.h delete mode 100644 arch/arm/plat-spear/include/plat/memory.h delete mode 100644 arch/arm/plat-tcc/include/mach/clkdev.h delete mode 100644 arch/arm/plat-tcc/include/mach/memory.h delete mode 100755 drivers/barcode_emul/Makefile delete mode 100755 drivers/barcode_emul/barcode_emul_ice4.c delete mode 100755 drivers/barcode_emul/barcode_emul_ice4.h delete mode 100644 drivers/gpu/drm/nouveau/nv40_mpeg.c delete mode 100644 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index e4177e2..5552e04 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -142,6 +142,7 @@ config MACH_SMDK6410 select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG select S3C_DEV_WDT + select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM select HAVE_S3C2410_WATCHDOG if WATCHDOG @@ -266,3 +267,27 @@ config MACH_SMARTQ7 select MACH_SMARTQ help Machine support for the SmartQ 7 + +config MACH_WLF_CRAGG_6410 + bool "Wolfson Cragganmore 6410" + select CPU_S3C6410 + select S3C64XX_SETUP_SDHCI + select S3C64XX_SETUP_I2C1 + select S3C64XX_SETUP_IDE + select S3C64XX_SETUP_FB_24BPP + select S3C64XX_SETUP_KEYPAD + select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_KEYPAD + select S3C_DEV_USB_HOST + select S3C_DEV_USB_HSOTG + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C_DEV_HSMMC2 + select S3C_DEV_I2C1 + select S3C_DEV_WDT + select S3C_DEV_RTC + select S3C64XX_DEV_SPI + select S3C24XX_GPIO_EXTRA128 + select I2C + help + Machine support for the Wolfson Cragganmore S3C6410 variant. diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 4657363..cfc0b99 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -13,7 +13,6 @@ obj- := # Core files obj-y += cpu.o obj-y += clock.o -obj-y += gpiolib.o # Core support for S3C6400 system @@ -23,10 +22,6 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o obj-y += irq.o obj-y += irq-eint.o -# CPU frequency scaling - -obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o - # DMA support obj-$(CONFIG_S3C64XX_DMA) += dma.o @@ -59,11 +54,10 @@ obj-$(CONFIG_MACH_HMT) += mach-hmt.o obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o +obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o # device support obj-y += dev-uart.o obj-y += dev-audio.o obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o -obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o -obj-$(CONFIG_S3C64XX_DEV_ONENAND1) += dev-onenand1.o diff --git a/arch/arm/mach-s3c64xx/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot index ba41fdc..c642333 100644 --- a/arch/arm/mach-s3c64xx/Makefile.boot +++ b/arch/arm/mach-s3c64xx/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x50008000 + zreladdr-y += 0x50008000 params_phys-y := 0x50000100 diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fdfc4d5..39c238d 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -25,13 +25,13 @@ #include #include -#include #include #include #include #include #include +#include /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call * ext_xtal_mux for want of an actual name from the manual. @@ -39,7 +39,6 @@ static struct clk clk_ext_xtal_mux = { .name = "ext_xtal", - .id = -1, }; #define clk_fin_apll clk_ext_xtal_mux @@ -51,13 +50,11 @@ static struct clk clk_ext_xtal_mux = { struct clk clk_h2 = { .name = "hclk2", - .id = -1, .rate = 0, }; struct clk clk_27m = { .name = "clk_27m", - .id = -1, .rate = 27000000, }; @@ -83,14 +80,12 @@ static int clk_48m_ctrl(struct clk *clk, int enable) struct clk clk_48m = { .name = "clk_48m", - .id = -1, .rate = 48000000, .enable = clk_48m_ctrl, }; struct clk clk_xusbxti = { .name = "xusbxti", - .id = -1, .rate = 48000000, }; @@ -130,109 +125,101 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable) static struct clk init_clocks_off[] = { { .name = "nand", - .id = -1, .parent = &clk_h, }, { .name = "rtc", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_RTC, }, { .name = "adc", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_TSADC, }, { .name = "i2c", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_IIC, }, { .name = "i2c", - .id = 1, + .devname = "s3c2440-i2c.1", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, }, { .name = "iis", - .id = 0, + .devname = "samsung-i2s.0", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_IIS0, }, { .name = "iis", - .id = 1, + .devname = "samsung-i2s.1", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_IIS1, }, { #ifdef CONFIG_CPU_S3C6410 .name = "iis", - .id = -1, /* There's only one IISv4 port */ .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, }, { #endif .name = "keypad", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_KEYPAD, }, { .name = "spi", - .id = 0, + .devname = "s3c64xx-spi.0", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_SPI0, }, { .name = "spi", - .id = 1, + .devname = "s3c64xx-spi.1", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_SPI1, }, { .name = "spi_48m", - .id = 0, + .devname = "s3c64xx-spi.0", .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, }, { .name = "spi_48m", - .id = 1, + .devname = "s3c64xx-spi.1", .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, }, { .name = "48m", - .id = 0, + .devname = "s3c-sdhci.0", .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_MMC0_48, }, { .name = "48m", - .id = 1, + .devname = "s3c-sdhci.1", .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_MMC1_48, }, { .name = "48m", - .id = 2, + .devname = "s3c-sdhci.2", .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, }, { .name = "dma0", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_DMA0, }, { .name = "dma1", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_DMA1, @@ -242,89 +229,81 @@ static struct clk init_clocks_off[] = { static struct clk init_clocks[] = { { .name = "lcd", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_LCD, }, { .name = "gpio", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_GPIO, }, { .name = "usb-host", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_UHOST, }, { .name = "hsmmc", - .id = 0, + .devname = "s3c-sdhci.0", .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_HSMMC0, }, { .name = "hsmmc", - .id = 1, + .devname = "s3c-sdhci.1", .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_HSMMC1, }, { .name = "hsmmc", - .id = 2, + .devname = "s3c-sdhci.2", .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, }, { .name = "otg", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_USB, }, { .name = "timers", - .id = -1, .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_PWM, }, { .name = "uart", - .id = 0, + .devname = "s3c6400-uart.0", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_UART0, }, { .name = "uart", - .id = 1, + .devname = "s3c6400-uart.1", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_UART1, }, { .name = "uart", - .id = 2, + .devname = "s3c6400-uart.2", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_UART2, }, { .name = "uart", - .id = 3, + .devname = "s3c6400-uart.3", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_UART3, }, { .name = "watchdog", - .id = -1, .parent = &clk_p, .ctrlbit = S3C_CLKCON_PCLK_WDT, }, { .name = "ac97", - .id = -1, .parent = &clk_p, .ctrlbit = S3C_CLKCON_PCLK_AC97, }, { .name = "cfcon", - .id = -1, .parent = &clk_h, .enable = s3c64xx_hclk_ctrl, .ctrlbit = S3C_CLKCON_HCLK_IHOST, @@ -334,7 +313,6 @@ static struct clk init_clocks[] = { static struct clk clk_fout_apll = { .name = "fout_apll", - .id = -1, }; static struct clk *clk_src_apll_list[] = { @@ -350,7 +328,6 @@ static struct clksrc_sources clk_src_apll = { static struct clksrc_clk clk_mout_apll = { .clk = { .name = "mout_apll", - .id = -1, }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1 }, .sources = &clk_src_apll, @@ -369,7 +346,6 @@ static struct clksrc_sources clk_src_epll = { static struct clksrc_clk clk_mout_epll = { .clk = { .name = "mout_epll", - .id = -1, }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1 }, .sources = &clk_src_epll, @@ -388,7 +364,6 @@ static struct clksrc_sources clk_src_mpll = { static struct clksrc_clk clk_mout_mpll = { .clk = { .name = "mout_mpll", - .id = -1, }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1 }, .sources = &clk_src_mpll, @@ -446,7 +421,6 @@ static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate) static struct clk clk_arm = { .name = "armclk", - .id = -1, .parent = &clk_mout_apll.clk, .ops = &(struct clk_ops) { .get_rate = s3c64xx_clk_arm_get_rate, @@ -473,7 +447,6 @@ static struct clk_ops clk_dout_ops = { static struct clk clk_dout_mpll = { .name = "dout_mpll", - .id = -1, .parent = &clk_mout_mpll.clk, .ops = &clk_dout_ops, }; @@ -540,22 +513,18 @@ static struct clksrc_sources clkset_uhost = { static struct clk clk_iis_cd0 = { .name = "iis_cdclk0", - .id = -1, }; static struct clk clk_iis_cd1 = { .name = "iis_cdclk1", - .id = -1, }; static struct clk clk_iisv4_cd = { .name = "iis_cdclk_v4", - .id = -1, }; static struct clk clk_pcm_cd = { .name = "pcm_cdclk", - .id = -1, }; static struct clk *clkset_audio0_list[] = { @@ -610,7 +579,7 @@ static struct clksrc_clk clksrcs[] = { { .clk = { .name = "mmc_bus", - .id = 0, + .devname = "s3c-sdhci.0", .ctrlbit = S3C_CLKCON_SCLK_MMC0, .enable = s3c64xx_sclk_ctrl, }, @@ -620,7 +589,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "mmc_bus", - .id = 1, + .devname = "s3c-sdhci.1", .ctrlbit = S3C_CLKCON_SCLK_MMC1, .enable = s3c64xx_sclk_ctrl, }, @@ -630,7 +599,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "mmc_bus", - .id = 2, + .devname = "s3c-sdhci.2", .ctrlbit = S3C_CLKCON_SCLK_MMC2, .enable = s3c64xx_sclk_ctrl, }, @@ -640,7 +609,6 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "usb-bus-host", - .id = -1, .ctrlbit = S3C_CLKCON_SCLK_UHOST, .enable = s3c64xx_sclk_ctrl, }, @@ -650,7 +618,6 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "uclk1", - .id = -1, .ctrlbit = S3C_CLKCON_SCLK_UART, .enable = s3c64xx_sclk_ctrl, }, @@ -661,7 +628,7 @@ static struct clksrc_clk clksrcs[] = { /* Where does UCLK0 come from? */ .clk = { .name = "spi-bus", - .id = 0, + .devname = "s3c64xx-spi.0", .ctrlbit = S3C_CLKCON_SCLK_SPI0, .enable = s3c64xx_sclk_ctrl, }, @@ -671,8 +638,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "spi-bus", - .id = 1, - .ctrlbit = S3C_CLKCON_SCLK_SPI1, + .devname = "s3c64xx-spi.1", .enable = s3c64xx_sclk_ctrl, }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 }, @@ -681,7 +647,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "audio-bus", - .id = 0, + .devname = "samsung-i2s.0", .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, .enable = s3c64xx_sclk_ctrl, }, @@ -691,7 +657,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "audio-bus", - .id = 1, + .devname = "samsung-i2s.1", .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, .enable = s3c64xx_sclk_ctrl, }, @@ -701,7 +667,7 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "audio-bus", - .id = 2, + .devname = "samsung-i2s.2", .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2, .enable = s3c64xx_sclk_ctrl, }, @@ -711,7 +677,6 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "irda-bus", - .id = 0, .ctrlbit = S3C_CLKCON_SCLK_IRDA, .enable = s3c64xx_sclk_ctrl, }, @@ -721,7 +686,6 @@ static struct clksrc_clk clksrcs[] = { }, { .clk = { .name = "camera", - .id = -1, .ctrlbit = S3C_CLKCON_SCLK_CAM, .enable = s3c64xx_sclk_ctrl, }, @@ -771,7 +735,8 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) /* For now assume the mux always selects the crystal */ clk_ext_xtal_mux.parent = xtal_clk; - epll = s3c6400_get_epll(xtal); + epll = s3c_get_pll6553x(xtal, __raw_readl(S3C_EPLL_CON0), + __raw_readl(S3C_EPLL_CON1)); mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); @@ -780,7 +745,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", apll, mpll, epll); - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) + /* Synchronous mode */ + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + else + /* Asynchronous mode */ + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index 374e45e..de085b7 100644 --- a/arch/arm/mach-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -33,8 +34,8 @@ #include #include -#include -#include +#include +#include /* table of supported CPUs */ @@ -43,16 +44,16 @@ static const char name_s3c6410[] = "S3C6410"; static struct cpu_table cpu_ids[] __initdata = { { - .idcode = 0x36400000, - .idmask = 0xfffff000, + .idcode = S3C6400_CPU_ID, + .idmask = S3C64XX_CPU_MASK, .map_io = s3c6400_map_io, .init_clocks = s3c6400_init_clocks, .init_uarts = s3c6400_init_uarts, .init = s3c6400_init, .name = name_s3c6400, }, { - .idcode = 0x36410100, - .idmask = 0xffffff00, + .idcode = S3C6410_CPU_ID, + .idmask = S3C64XX_CPU_MASK, .map_io = s3c6410_map_io, .init_clocks = s3c6410_init_clocks, .init_uarts = s3c6410_init_uarts, @@ -140,22 +141,15 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) { - unsigned long idcode; - /* initialise the io descriptors we need for initialisation */ iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); iotable_init(mach_desc, size); + init_consistent_dma_size(SZ_8M); - idcode = __raw_readl(S3C_VA_SYS + 0x118); - if (!idcode) { - /* S3C6400 has the ID register in a different place, - * and needs a write before it can be read. */ - - __raw_writel(0x0, S3C_VA_SYS + 0xA1C); - idcode = __raw_readl(S3C_VA_SYS + 0xA1C); - } + /* detect cpu id */ + s3c64xx_init_cpu(); - s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); } static __init int s3c64xx_sysdev_init(void) diff --git a/arch/arm/mach-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c deleted file mode 100644 index 4375b97..0000000 --- a/arch/arm/mach-s3c64xx/cpufreq.c +++ /dev/null @@ -1,270 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/cpufreq.c - * - * Copyright 2009 Wolfson Microelectronics plc - * - * S3C64xx CPUfreq Support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include - -static struct clk *armclk; -static struct regulator *vddarm; -static unsigned long regulator_latency; - -#ifdef CONFIG_CPU_S3C6410 -struct s3c64xx_dvfs { - unsigned int vddarm_min; - unsigned int vddarm_max; -}; - -static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = { - [0] = { 1000000, 1150000 }, - [1] = { 1050000, 1150000 }, - [2] = { 1100000, 1150000 }, - [3] = { 1200000, 1350000 }, -}; - -static struct cpufreq_frequency_table s3c64xx_freq_table[] = { - { 0, 66000 }, - { 0, 133000 }, - { 1, 222000 }, - { 1, 266000 }, - { 2, 333000 }, - { 2, 400000 }, - { 2, 532000 }, - { 2, 533000 }, - { 3, 667000 }, - { 0, CPUFREQ_TABLE_END }, -}; -#endif - -static int s3c64xx_cpufreq_verify_speed(struct cpufreq_policy *policy) -{ - if (policy->cpu != 0) - return -EINVAL; - - return cpufreq_frequency_table_verify(policy, s3c64xx_freq_table); -} - -static unsigned int s3c64xx_cpufreq_get_speed(unsigned int cpu) -{ - if (cpu != 0) - return 0; - - return clk_get_rate(armclk) / 1000; -} - -static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) -{ - int ret; - unsigned int i; - struct cpufreq_freqs freqs; - struct s3c64xx_dvfs *dvfs; - - ret = cpufreq_frequency_table_target(policy, s3c64xx_freq_table, - target_freq, relation, &i); - if (ret != 0) - return ret; - - freqs.cpu = 0; - freqs.old = clk_get_rate(armclk) / 1000; - freqs.new = s3c64xx_freq_table[i].frequency; - freqs.flags = 0; - dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].index]; - - if (freqs.old == freqs.new) - return 0; - - pr_debug("cpufreq: Transition %d-%dkHz\n", freqs.old, freqs.new); - - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); - -#ifdef CONFIG_REGULATOR - if (vddarm && freqs.new > freqs.old) { - ret = regulator_set_voltage(vddarm, - dvfs->vddarm_min, - dvfs->vddarm_max); - if (ret != 0) { - pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n", - freqs.new, ret); - goto err; - } - } -#endif - - ret = clk_set_rate(armclk, freqs.new * 1000); - if (ret < 0) { - pr_err("cpufreq: Failed to set rate %dkHz: %d\n", - freqs.new, ret); - goto err; - } - -#ifdef CONFIG_REGULATOR - if (vddarm && freqs.new < freqs.old) { - ret = regulator_set_voltage(vddarm, - dvfs->vddarm_min, - dvfs->vddarm_max); - if (ret != 0) { - pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n", - freqs.new, ret); - goto err_clk; - } - } -#endif - - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - - pr_debug("cpufreq: Set actual frequency %lukHz\n", - clk_get_rate(armclk) / 1000); - - return 0; - -err_clk: - if (clk_set_rate(armclk, freqs.old * 1000) < 0) - pr_err("Failed to restore original clock rate\n"); -err: - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - - return ret; -} - -#ifdef CONFIG_REGULATOR -static void __init s3c64xx_cpufreq_config_regulator(void) -{ - int count, v, i, found; - struct cpufreq_frequency_table *freq; - struct s3c64xx_dvfs *dvfs; - - count = regulator_count_voltages(vddarm); - if (count < 0) { - pr_err("cpufreq: Unable to check supported voltages\n"); - } - - freq = s3c64xx_freq_table; - while (count > 0 && freq->frequency != CPUFREQ_TABLE_END) { - if (freq->frequency == CPUFREQ_ENTRY_INVALID) - continue; - - dvfs = &s3c64xx_dvfs_table[freq->index]; - found = 0; - - for (i = 0; i < count; i++) { - v = regulator_list_voltage(vddarm, i); - if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max) - found = 1; - } - - if (!found) { - pr_debug("cpufreq: %dkHz unsupported by regulator\n", - freq->frequency); - freq->frequency = CPUFREQ_ENTRY_INVALID; - } - - freq++; - } - - /* Guess based on having to do an I2C/SPI write; in future we - * will be able to query the regulator performance here. */ - regulator_latency = 1 * 1000 * 1000; -} -#endif - -static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy) -{ - int ret; - struct cpufreq_frequency_table *freq; - - if (policy->cpu != 0) - return -EINVAL; - - if (s3c64xx_freq_table == NULL) { - pr_err("cpufreq: No frequency information for this CPU\n"); - return -ENODEV; - } - - armclk = clk_get(NULL, "armclk"); - if (IS_ERR(armclk)) { - pr_err("cpufreq: Unable to obtain ARMCLK: %ld\n", - PTR_ERR(armclk)); - return PTR_ERR(armclk); - } - -#ifdef CONFIG_REGULATOR - vddarm = regulator_get(NULL, "vddarm"); - if (IS_ERR(vddarm)) { - ret = PTR_ERR(vddarm); - pr_err("cpufreq: Failed to obtain VDDARM: %d\n", ret); - pr_err("cpufreq: Only frequency scaling available\n"); - vddarm = NULL; - } else { - s3c64xx_cpufreq_config_regulator(); - } -#endif - - freq = s3c64xx_freq_table; - while (freq->frequency != CPUFREQ_TABLE_END) { - unsigned long r; - - /* Check for frequencies we can generate */ - r = clk_round_rate(armclk, freq->frequency * 1000); - r /= 1000; - if (r != freq->frequency) { - pr_debug("cpufreq: %dkHz unsupported by clock\n", - freq->frequency); - freq->frequency = CPUFREQ_ENTRY_INVALID; - } - - /* If we have no regulator then assume startup - * frequency is the maximum we can support. */ - if (!vddarm && freq->frequency > s3c64xx_cpufreq_get_speed(0)) - freq->frequency = CPUFREQ_ENTRY_INVALID; - - freq++; - } - - policy->cur = clk_get_rate(armclk) / 1000; - - /* Datasheet says PLL stabalisation time (if we were to use - * the PLLs, which we don't currently) is ~300us worst case, - * but add some fudge. - */ - policy->cpuinfo.transition_latency = (500 * 1000) + regulator_latency; - - ret = cpufreq_frequency_table_cpuinfo(policy, s3c64xx_freq_table); - if (ret != 0) { - pr_err("cpufreq: Failed to configure frequency table: %d\n", - ret); - regulator_put(vddarm); - clk_put(armclk); - } - - return ret; -} - -static struct cpufreq_driver s3c64xx_cpufreq_driver = { - .owner = THIS_MODULE, - .flags = 0, - .verify = s3c64xx_cpufreq_verify_speed, - .target = s3c64xx_cpufreq_set_target, - .get = s3c64xx_cpufreq_get_speed, - .init = s3c64xx_cpufreq_driver_init, - .name = "s3c", -}; - -static int __init s3c64xx_cpufreq_init(void) -{ - return cpufreq_register_driver(&s3c64xx_cpufreq_driver); -} -module_init(s3c64xx_cpufreq_init); diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index cad6702..93470b1 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-s3c64xx/dev-onenand1.c b/arch/arm/mach-s3c64xx/dev-onenand1.c deleted file mode 100644 index 92ffd5b..0000000 --- a/arch/arm/mach-s3c64xx/dev-onenand1.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * linux/arch/arm/mach-s3c64xx/dev-onenand1.c - * - * Copyright (c) 2008-2010 Samsung Electronics - * Kyungmin Park - * - * S3C64XX series device definition for OneNAND devices - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include -#include - -static struct resource s3c64xx_onenand1_resources[] = { - [0] = { - .start = S3C64XX_PA_ONENAND1, - .end = S3C64XX_PA_ONENAND1 + 0x400 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = S3C64XX_PA_ONENAND1_BUF, - .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_ONENAND1, - .end = IRQ_ONENAND1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device s3c64xx_device_onenand1 = { - .name = "samsung-onenand", - .id = 1, - .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), - .resource = s3c64xx_onenand1_resources, -}; - -void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) -{ - struct onenand_platform_data *pd; - - pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); - if (!pd) - printk(KERN_ERR "%s: no memory for platform data\n", __func__); - s3c64xx_device_onenand1.dev.platform_data = pd; -} diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 5e6b420..3341fd1 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c index f797f74..c681b99 100644 --- a/arch/arm/mach-s3c64xx/dev-uart.c +++ b/arch/arm/mach-s3c64xx/dev-uart.c @@ -37,21 +37,10 @@ static struct resource s3c64xx_uart0_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX0, - .end = IRQ_S3CUART_RX0, + .start = IRQ_UART0, + .end = IRQ_UART0, .flags = IORESOURCE_IRQ, }, - [2] = { - .start = IRQ_S3CUART_TX0, - .end = IRQ_S3CUART_TX0, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR0, - .end = IRQ_S3CUART_ERR0, - .flags = IORESOURCE_IRQ, - } }; static struct resource s3c64xx_uart1_resource[] = { @@ -61,19 +50,8 @@ static struct resource s3c64xx_uart1_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX1, - .end = IRQ_S3CUART_RX1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX1, - .end = IRQ_S3CUART_TX1, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR1, - .end = IRQ_S3CUART_ERR1, + .start = IRQ_UART1, + .end = IRQ_UART1, .flags = IORESOURCE_IRQ, }, }; @@ -85,19 +63,8 @@ static struct resource s3c6xx_uart2_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX2, - .end = IRQ_S3CUART_RX2, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX2, - .end = IRQ_S3CUART_TX2, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR2, - .end = IRQ_S3CUART_ERR2, + .start = IRQ_UART2, + .end = IRQ_UART2, .flags = IORESOURCE_IRQ, }, }; @@ -109,19 +76,8 @@ static struct resource s3c64xx_uart3_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX3, - .end = IRQ_S3CUART_RX3, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX3, - .end = IRQ_S3CUART_TX3, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR3, - .end = IRQ_S3CUART_ERR3, + .start = IRQ_UART3, + .end = IRQ_UART3, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 204bfaf..17d62f4 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -147,14 +147,14 @@ static void s3c64xx_dma_fill_lli(struct s3c2410_dma_chan *chan, u32 control0, control1; switch (chan->source) { - case S3C2410_DMASRC_HW: + case DMA_FROM_DEVICE: src = chan->dev_addr; dst = data; control0 = PL080_CONTROL_SRC_AHB2; control0 |= PL080_CONTROL_DST_INCR; break; - case S3C2410_DMASRC_MEM: + case DMA_TO_DEVICE: src = data; dst = chan->dev_addr; control0 = PL080_CONTROL_DST_AHB2; @@ -416,7 +416,7 @@ EXPORT_SYMBOL(s3c2410_dma_enqueue); int s3c2410_dma_devconfig(enum dma_ch channel, - enum s3c2410_dmasrc source, + enum dma_data_direction source, unsigned long devaddr) { struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); @@ -437,11 +437,11 @@ int s3c2410_dma_devconfig(enum dma_ch channel, pr_debug("%s: peripheral %d\n", __func__, peripheral); switch (source) { - case S3C2410_DMASRC_HW: + case DMA_FROM_DEVICE: config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT; config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT; break; - case S3C2410_DMASRC_MEM: + case DMA_TO_DEVICE: config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT; config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT; break; @@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void) } /* Set all DMA configuration to be DMA, not SDMA */ - writel(0xffffff, S3C_SYSREG(0x110)); + writel(0xffffff, S3C64XX_SDMA_SEL); /* Register standard DMA controllers */ s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c deleted file mode 100644 index 92b0908..0000000 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ /dev/null @@ -1,290 +0,0 @@ -/* arch/arm/plat-s3c64xx/gpiolib.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - GPIOlib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -/* GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 8 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * D 5 4Bit Yes 3 - * E 5 4Bit Yes None - * F 16 2Bit Yes 4 [1] - * G 7 4Bit Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * K 16 4Bit[2] No None - * L 15 4Bit[2] No None - * M 6 4Bit No IRQ_EINT - * N 16 2Bit No IRQ_EINT - * O 16 2Bit Yes 7 - * P 15 2Bit Yes 8 - * Q 9 2Bit Yes 9 - * - * [1] BANKF pins 14,15 do not form part of the external interrupt sources - * [2] BANK has two control registers, GPxCON0 and GPxCON1 - */ - -static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = { - .cfg_eint = 7, - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { - .cfg_eint = 3, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) -{ - return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; -} - -static struct s3c_gpio_chip gpio_4bit[] = { - { - .base = S3C64XX_GPA_BASE, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPA(0), - .ngpio = S3C64XX_GPIO_A_NR, - .label = "GPA", - }, - }, { - .base = S3C64XX_GPB_BASE, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPB(0), - .ngpio = S3C64XX_GPIO_B_NR, - .label = "GPB", - }, - }, { - .base = S3C64XX_GPC_BASE, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPC(0), - .ngpio = S3C64XX_GPIO_C_NR, - .label = "GPC", - }, - }, { - .base = S3C64XX_GPD_BASE, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPD(0), - .ngpio = S3C64XX_GPIO_D_NR, - .label = "GPD", - }, - }, { - .base = S3C64XX_GPE_BASE, - .config = &gpio_4bit_cfg_noint, - .chip = { - .base = S3C64XX_GPE(0), - .ngpio = S3C64XX_GPIO_E_NR, - .label = "GPE", - }, - }, { - .base = S3C64XX_GPG_BASE, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPG(0), - .ngpio = S3C64XX_GPIO_G_NR, - .label = "GPG", - }, - }, { - .base = S3C64XX_GPM_BASE, - .config = &gpio_4bit_cfg_eint0011, - .chip = { - .base = S3C64XX_GPM(0), - .ngpio = S3C64XX_GPIO_M_NR, - .label = "GPM", - .to_irq = s3c64xx_gpio2int_gpm, - }, - }, -}; - -static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) -{ - return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; -} - -static struct s3c_gpio_chip gpio_4bit2[] = { - { - .base = S3C64XX_GPH_BASE + 0x4, - .config = &gpio_4bit_cfg_eint0111, - .chip = { - .base = S3C64XX_GPH(0), - .ngpio = S3C64XX_GPIO_H_NR, - .label = "GPH", - }, - }, { - .base = S3C64XX_GPK_BASE + 0x4, - .config = &gpio_4bit_cfg_noint, - .chip = { - .base = S3C64XX_GPK(0), - .ngpio = S3C64XX_GPIO_K_NR, - .label = "GPK", - }, - }, { - .base = S3C64XX_GPL_BASE + 0x4, - .config = &gpio_4bit_cfg_eint0011, - .chip = { - .base = S3C64XX_GPL(0), - .ngpio = S3C64XX_GPIO_L_NR, - .label = "GPL", - .to_irq = s3c64xx_gpio2int_gpl, - }, - }, -}; - -static struct s3c_gpio_cfg gpio_2bit_cfg_noint = { - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = { - .cfg_eint = 2, - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { - .cfg_eint = 3, - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_chip gpio_2bit[] = { - { - .base = S3C64XX_GPF_BASE, - .config = &gpio_2bit_cfg_eint11, - .chip = { - .base = S3C64XX_GPF(0), - .ngpio = S3C64XX_GPIO_F_NR, - .label = "GPF", - }, - }, { - .base = S3C64XX_GPI_BASE, - .config = &gpio_2bit_cfg_noint, - .chip = { - .base = S3C64XX_GPI(0), - .ngpio = S3C64XX_GPIO_I_NR, - .label = "GPI", - }, - }, { - .base = S3C64XX_GPJ_BASE, - .config = &gpio_2bit_cfg_noint, - .chip = { - .base = S3C64XX_GPJ(0), - .ngpio = S3C64XX_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .base = S3C64XX_GPN_BASE, - .irq_base = IRQ_EINT(0), - .config = &gpio_2bit_cfg_eint10, - .chip = { - .base = S3C64XX_GPN(0), - .ngpio = S3C64XX_GPIO_N_NR, - .label = "GPN", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = S3C64XX_GPO_BASE, - .config = &gpio_2bit_cfg_eint11, - .chip = { - .base = S3C64XX_GPO(0), - .ngpio = S3C64XX_GPIO_O_NR, - .label = "GPO", - }, - }, { - .base = S3C64XX_GPP_BASE, - .config = &gpio_2bit_cfg_eint11, - .chip = { - .base = S3C64XX_GPP(0), - .ngpio = S3C64XX_GPIO_P_NR, - .label = "GPP", - }, - }, { - .base = S3C64XX_GPQ_BASE, - .config = &gpio_2bit_cfg_eint11, - .chip = { - .base = S3C64XX_GPQ(0), - .ngpio = S3C64XX_GPIO_Q_NR, - .label = "GPQ", - }, - }, -}; - -static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip) -{ - chip->pm = __gpio_pm(&s3c_gpio_pm_2bit); -} - -static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips, - int nr_chips, - void (*fn)(struct s3c_gpio_chip *)) -{ - for (; nr_chips > 0; nr_chips--, chips++) { - if (fn) - (fn)(chips); - s3c_gpiolib_add(chips); - } -} - -static __init int s3c64xx_gpiolib_init(void) -{ - s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit), - samsung_gpiolib_add_4bit); - - s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2), - samsung_gpiolib_add_4bit2); - - s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit), - s3c64xx_gpiolib_add_2bit); - - return 0; -} - -core_initcall(s3c64xx_gpiolib_init); diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index a29e705..c0c076a 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S @@ -21,7 +21,7 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C_PA_UART ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index 0a5d926..fe1a98c 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h @@ -58,11 +58,15 @@ enum dma_ch { DMACH_MAX /* the end */ }; -static __inline__ bool s3c_dma_has_circular(void) +static inline bool samsung_dma_has_circular(void) { return true; } +static inline bool samsung_dma_is_dmadev(void) +{ + return false; +} #define S3C2410_DMAF_CIRCULAR (1 << 0) #include @@ -95,7 +99,7 @@ struct s3c2410_dma_chan { unsigned char peripheral; unsigned int flags; - enum s3c2410_dmasrc source; + enum dma_data_direction source; dma_addr_t dev_addr; diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h index 0d46e99..6e34c2f 100644 --- a/arch/arm/mach-s3c64xx/include/mach/gpio.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h @@ -12,11 +12,6 @@ * published by the Free Software Foundation. */ -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep -#define gpio_to_irq __gpio_to_irq - /* GPIO bank sizes */ #define S3C64XX_GPIO_A_NR (8) #define S3C64XX_GPIO_B_NR (7) @@ -96,5 +91,3 @@ enum s3c_gpio_number { #define BOARD_NR_GPIOS 16 #define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS) - -#include diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index 8e2df26..443f85b 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -27,36 +27,6 @@ #define IRQ_VIC0_BASE S3C_IRQ(0) #define IRQ_VIC1_BASE S3C_IRQ(32) -/* UART interrupts, each UART has 4 intterupts per channel so - * use the space between the ISA and S3C main interrupts. Note, these - * are not in the same order as the S3C24XX series! */ - -#define IRQ_S3CUART_BASE0 (16) -#define IRQ_S3CUART_BASE1 (20) -#define IRQ_S3CUART_BASE2 (24) -#define IRQ_S3CUART_BASE3 (28) - -#define UART_IRQ_RXD (0) -#define UART_IRQ_ERR (1) -#define UART_IRQ_TXD (2) -#define UART_IRQ_MODEM (3) - -#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) - /* VIC based IRQs */ #define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) @@ -198,7 +168,9 @@ * interrupt controllers). */ #define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) -#ifdef CONFIG_SMDK6410_WM1190_EV1 +#ifdef CONFIG_MACH_WLF_CRAGG_6410 +#define IRQ_BOARD_NR 128 +#elif defined(CONFIG_SMDK6410_WM1190_EV1) #define IRQ_BOARD_NR 64 #elif defined(CONFIG_SMDK6410_WM1192_EV1) #define IRQ_BOARD_NR 64 @@ -215,6 +187,7 @@ /* Compatibility */ #define IRQ_ONENAND IRQ_ONENAND0 +#define IRQ_I2S0 IRQ_S3C6410_IIS #endif /* __ASM_MACH_S3C64XX_IRQS_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index a1f13f0..23a1d71 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h @@ -16,6 +16,7 @@ #define __ASM_ARCH_MAP_H __FILE__ #include +#include /* * Post-mux Chip Select Regions Xm0CSn_ @@ -83,7 +84,6 @@ #define S3C64XX_PA_IIC1 (0x7F00F000) #define S3C64XX_PA_GPIO (0x7F008000) -#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) #define S3C64XX_SZ_GPIO SZ_4K #define S3C64XX_PA_SDRAM (0x50000000) @@ -94,16 +94,10 @@ #define S3C64XX_PA_VIC1 (0x71300000) #define S3C64XX_PA_MODEM (0x74108000) -#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) #define S3C64XX_PA_USBHOST (0x74300000) #define S3C64XX_PA_USB_HSPHY (0x7C100000) -#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) - -/* place VICs close together */ -#define VA_VIC0 (S3C_VA_IRQ + 0x00) -#define VA_VIC1 (S3C_VA_IRQ + 0x10000) /* compatibiltiy defines. */ #define S3C_PA_TIMER S3C64XX_PA_TIMER @@ -119,7 +113,6 @@ #define S3C_PA_FB S3C64XX_PA_FB #define S3C_PA_USBHOST S3C64XX_PA_USBHOST #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG -#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY #define S3C_PA_RTC S3C64XX_PA_RTC #define S3C_PA_WDT S3C64XX_PA_WATCHDOG diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h deleted file mode 100644 index 4760cda..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/memory.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-s3c6400/include/mach/memory.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x50000000) - -#define CONSISTENT_DMA_SIZE SZ_8M - -#endif diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h deleted file mode 100644 index 5ef0bb6..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/pll.h +++ /dev/null @@ -1,45 +0,0 @@ -/* arch/arm/plat-s3c64xx/include/plat/pll.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX PLL code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) -#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) -#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) -#define S3C6400_PLL_MDIV_SHIFT (16) -#define S3C6400_PLL_PDIV_SHIFT (8) -#define S3C6400_PLL_SDIV_SHIFT (0) - -#include -#include - -static inline unsigned long s3c6400_get_pll(unsigned long baseclk, - u32 pllcon) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; - pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; - sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -static inline unsigned long s3c6400_get_epll(unsigned long baseclk) -{ - return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0), - __raw_readl(S3C_EPLL_CON1)); -} diff --git a/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h index 1e9f20f..fcf3dca 100644 --- a/arch/arm/mach-s3c64xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h @@ -53,7 +53,7 @@ static inline void s3c_pm_arch_show_resume_irqs(void) * the IRQ wake controls depending on the CPU we are running on */ #define s3c_irqwake_eintallow ((1 << 28) - 1) -#define s3c_irqwake_intallow (0) +#define s3c_irqwake_intallow (~0) static inline void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) @@ -96,3 +96,20 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs, save->ucon = new_ucon; } } + +static inline void s3c_pm_restored_gpios(void) +{ + /* ensure sleep mode has been cleared from the system */ + + __raw_writel(0, S3C64XX_SLPEN); +} + +static inline void samsung_pm_saved_gpios(void) +{ + /* turn on the sleep mode and keep it there, as it seems that during + * suspend the xCON registers get re-set and thus you can end up with + * problems between going to sleep and resuming. + */ + + __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); +} diff --git a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h deleted file mode 100644 index b25bede..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h +++ /dev/null @@ -1,56 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64xx - pwm clock and timer support - */ - -/** - * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. - * - * Return true if the given configuration from TCFG1 is a TCLK instead - * any of the TDIV clocks. - */ -static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) -{ - return tcfg >= S3C64XX_TCFG1_MUX_TCLK; -} - -/** - * tcfg_to_divisor() - convert tcfg1 setting to a divisor - * @tcfg1: The tcfg1 setting, shifted down. - * - * Get the divisor value for the given tcfg1 setting. We assume the - * caller has already checked to see if this is not a TCLK source. - */ -static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) -{ - return 1 << tcfg1; -} - -/** - * pwm_tdiv_has_div1() - does the tdiv setting have a /1 - * - * Return true if we have a /1 in the tdiv setting. - */ -static inline unsigned int pwm_tdiv_has_div1(void) -{ - return 1; -} - -/** - * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. - * @div: The divisor to calculate the bit information for. - * - * Turn a divisor into the necessary bit field for TCFG1. - */ -static inline unsigned long pwm_tdiv_div_bits(unsigned int div) -{ - return ilog2(div); -} - -#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h deleted file mode 100644 index a06ee0a..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Copyright 2009 Samsung Electronics Co. - * - * Pawel Osciak - * Based on plat-s3c/include/plat/regs-fb.h by Ben Dooks - * - * Framebuffer register definitions for Samsung S3C64xx. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MACH_REGS_FB_H -#define __ASM_ARCH_MACH_REGS_FB_H __FILE__ - -#include - -#endif /* __ASM_ARCH_MACH_REGS_FB_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h index 69b78d9..b91e020 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h @@ -21,8 +21,11 @@ #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) +#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110) + #define S3C64XX_OTHERS S3C_SYSREG(0x900) #define S3C64XX_OTHERS_USBMASK (1 << 16) +#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) #endif /* _PLAT_REGS_SYS_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h deleted file mode 100644 index f86958d..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h +++ /dev/null @@ -1,36 +0,0 @@ -/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Header file for s3c6400 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for S3C6400 related SoCs */ - -extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c6400_setup_clocks(void); - -extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); - -#ifdef CONFIG_CPU_S3C6400 - -extern int s3c6400_init(void); -extern void s3c6400_init_irq(void); -extern void s3c6400_map_io(void); -extern void s3c6400_init_clocks(int xtal); - -#define s3c6400_init_uarts s3c6400_common_init_uarts - -#else -#define s3c6400_init_clocks NULL -#define s3c6400_init_uarts NULL -#define s3c6400_map_io NULL -#define s3c6400_init NULL -#endif diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h deleted file mode 100644 index 24f1141..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h +++ /dev/null @@ -1,29 +0,0 @@ -/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Header file for s3c6410 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifdef CONFIG_CPU_S3C6410 - -extern int s3c6410_init(void); -extern void s3c6410_init_irq(void); -extern void s3c6410_map_io(void); -extern void s3c6410_init_clocks(int xtal); - -#define s3c6410_init_uarts s3c6400_common_init_uarts - -#else -#define s3c6410_init_clocks NULL -#define s3c6410_init_uarts NULL -#define s3c6410_map_io NULL -#define s3c6410_init NULL -#endif diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c index 97660c8..b07357e 100644 --- a/arch/arm/mach-s3c64xx/irq.c +++ b/arch/arm/mach-s3c64xx/irq.c @@ -25,40 +25,23 @@ #include #include -static struct s3c_uart_irq uart_irqs[] = { - [0] = { - .regs = S3C_VA_UART0, - .base_irq = IRQ_S3CUART_BASE0, - .parent_irq = IRQ_UART0, - }, - [1] = { - .regs = S3C_VA_UART1, - .base_irq = IRQ_S3CUART_BASE1, - .parent_irq = IRQ_UART1, - }, - [2] = { - .regs = S3C_VA_UART2, - .base_irq = IRQ_S3CUART_BASE2, - .parent_irq = IRQ_UART2, - }, - [3] = { - .regs = S3C_VA_UART3, - .base_irq = IRQ_S3CUART_BASE3, - .parent_irq = IRQ_UART3, - }, -}; - +/* setup the sources the vic should advertise resume for, even though it + * is not doing the wake (set_irq_wake needs to be valid) */ +#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) +#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ + 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) { printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); /* initialise the pair of VICs */ - vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0); - vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0); + vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); + vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); /* add the timer sub-irqs */ s3c_init_vic_timer_irq(5, IRQ_TIMER0); - - s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); } diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index a53cf14..8eba88e 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -35,7 +35,6 @@ #include #include -#include #include #include @@ -44,8 +43,9 @@ #include #include #include +#include -#include +#include #include #include #include @@ -233,7 +233,7 @@ static void __init anw6410_machine_init(void) MACHINE_START(ANW6410, "A&W6410") /* Maintainer: Kwangwoo Lee */ - .boot_params = S3C64XX_PA_SDRAM + 0x100, + .atag_offset = 0x100, .init_irq = s3c6410_init_irq, .map_io = anw6410_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index b263958..952f75f 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -27,7 +27,6 @@ #include #include -#include #include #include @@ -38,10 +37,11 @@ #include #include -#include +#include #include #include #include +#include #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) @@ -265,7 +265,7 @@ static void __init hmt_machine_init(void) MACHINE_START(HMT, "Airgoo-HMT") /* Maintainer: Peter Korsgaard */ - .boot_params = S3C64XX_PA_SDRAM + 0x100, + .atag_offset = 0x100, .init_irq = s3c6410_init_irq, .map_io = hmt_map_io, .init_machine = hmt_machine_init, diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 89f35e0..1bc85c3 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -29,12 +29,11 @@ #include #include -#include #include #include #include -#include +#include #include #include #include @@ -42,6 +41,7 @@ #include #include #include +#include #include