From a1d1c11c3d74677c210fb1a2db4dbeb239dc6d49 Mon Sep 17 00:00:00 2001 From: Shane Huang Date: Wed, 22 Jan 2014 14:05:46 -0800 Subject: i2c: piix4: Add support for AMD ML and CZ SMBus changes commit 032f708bc4f6da868ec49dac48ddf3670d8035d3 upstream. The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang Reviewed-by: Jean Delvare Signed-off-by: Wolfram Sang [bwh: Backported to 3.2: - Adjust context - Aux bus support is not included] Signed-off-by: Ben Hutchings --- Documentation/i2c/busses/i2c-piix4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index 65da157..0982e72 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -8,7 +8,7 @@ Supported adapters: Datasheet: Only available via NDA from ServerWorks * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges Datasheet: Not publicly available - * AMD Hudson-2, CZ + * AMD Hudson-2, ML, CZ Datasheet: Not publicly available * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge Datasheet: Publicly available at the SMSC website http://www.smsc.com -- cgit v1.1