From 684f741446f7a3108b4c167faf20214c42b7eeac Mon Sep 17 00:00:00 2001 From: Zhiwu Song Date: Tue, 30 Aug 2011 19:20:34 -0700 Subject: ARM: CSR: add rtc i/o bridge interface for SiRFprimaII The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song Signed-off-by: Barry Song Reviewed-by: Jamie Iles Acked-by: Arnd Bergmann --- arch/arm/boot/dts/prima2-cb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/prima2-cb.dts b/arch/arm/boot/dts/prima2-cb.dts index af86931..17b6737 100644 --- a/arch/arm/boot/dts/prima2-cb.dts +++ b/arch/arm/boot/dts/prima2-cb.dts @@ -363,7 +363,7 @@ }; rtc-iobg { - compatible = "sirf,prima2-rtciobg", "simple-bus"; + compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x80030000 0x10000>; -- cgit v1.1