From 1f4b49a4293ea7b0adeaeae37207b9c9fd2dd7c2 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Thu, 31 May 2007 09:29:33 +0100 Subject: [ARM] 4418/1: AT91: Number of programmable clocks differs The number of programmable clocks available on the AT91 processors can differ, therefore do not always display the contents of the PMC_PCKR(0) .. PMC_PCKR(3) registers (ie, assume there are 4 clocks). If CONFIG_AT91_PROGRAMMABLE_CLOCKS is enabled, the programmable clocks will be registered like the other system/peripheral clocks, and the state of the programmable clocks will be displayed like with the other clocks. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/clock.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 06c9a05..848efb2 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -364,19 +364,14 @@ static int at91_clk_show(struct seq_file *s, void *unused) { u32 scsr, pcsr, sr; struct clk *clk; - unsigned i; seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR)); seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR)); - seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR)); seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR)); seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR)); seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); - seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); - for (i = 0; i < 4; i++) - seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i))); seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); seq_printf(s, "\n"); -- cgit v1.1