From 584ecbaa258de953a9bc34ce4b978b0033e54dc4 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 26 Jun 2011 14:11:24 -0400 Subject: Blackfin: dpmc: relocate hibernate helper macros This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger --- arch/blackfin/include/asm/dpmc.h | 26 -------------------------- 1 file changed, 26 deletions(-) (limited to 'arch/blackfin/include/asm/dpmc.h') diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h index edf2a2a..d1ba877 100644 --- a/arch/blackfin/include/asm/dpmc.h +++ b/arch/blackfin/include/asm/dpmc.h @@ -134,32 +134,6 @@ struct bfin_dpmc_platform_data { unsigned short vr_settling_time; /* in us */ }; -#else - -#define PM_PUSH(x) \ - R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\ - [--SP] = R0;\ - -#define PM_POP(x) \ - R0 = [SP++];\ - [P0 + (x - SRAM_BASE_ADDRESS)] = R0;\ - -#define PM_SYS_PUSH(x) \ - R0 = [P0 + (x - PLL_CTL)];\ - [--SP] = R0;\ - -#define PM_SYS_POP(x) \ - R0 = [SP++];\ - [P0 + (x - PLL_CTL)] = R0;\ - -#define PM_SYS_PUSH16(x) \ - R0 = w[P0 + (x - PLL_CTL)];\ - [--SP] = R0;\ - -#define PM_SYS_POP16(x) \ - R0 = [SP++];\ - w[P0 + (x - PLL_CTL)] = R0;\ - #endif #endif /*_BLACKFIN_DPMC_H_*/ -- cgit v1.1 From eed7b8365807549c67613ea7d9a451262050ba3e Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 26 Jun 2011 23:11:19 -0400 Subject: Blackfin: dpmc: optimize hibernate/resume path The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger --- arch/blackfin/include/asm/dpmc.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/blackfin/include/asm/dpmc.h') diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h index d1ba877..c4ec959 100644 --- a/arch/blackfin/include/asm/dpmc.h +++ b/arch/blackfin/include/asm/dpmc.h @@ -117,7 +117,6 @@ #ifndef __ASSEMBLY__ void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); -void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void do_hibernate(int wakeup); void set_dram_srfs(void); -- cgit v1.1