From 2ac211bc423a0e62fe3ca3d78954de3174ae41f2 Mon Sep 17 00:00:00 2001 From: Richard Kuo Date: Mon, 31 Oct 2011 18:42:51 -0500 Subject: Hexagon: Add interrupts Signed-off-by: Richard Kuo Signed-off-by: Linas Vepstas Reviewed-by: Thomas Gleixner Acked-by: Arnd Bergmann Signed-off-by: Linus Torvalds --- arch/hexagon/include/asm/irq.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/hexagon/include/asm/irq.h (limited to 'arch/hexagon/include/asm/irq.h') diff --git a/arch/hexagon/include/asm/irq.h b/arch/hexagon/include/asm/irq.h new file mode 100644 index 0000000..ded8c15 --- /dev/null +++ b/arch/hexagon/include/asm/irq.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _ASM_IRQ_H_ +#define _ASM_IRQ_H_ + +/* Number of first-level interrupts associated with the CPU core. */ +#define HEXAGON_CPUINTS 32 + +/* + * Must define NR_IRQS before including + * 64 == the two SIRC's, 176 == the two gpio's + * + * IRQ configuration is still in flux; defining this to a comfortably + * large number. + */ +#define NR_IRQS 512 + +#include + +#endif -- cgit v1.1