From f2154bef817ac3d0ea67b52526fd8e88898b66f9 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 19 May 2009 14:38:08 +1000 Subject: m68knommu: merge old ColdFire interrupt controller masking macros Currently the code that supports setting the old style ColdFire interrupt controller mask registers is macros in the include files of each of the CPU types. Merge all these into a set of real masking functions in the old Coldfire interrupt controller code proper. All the macros are basically the same (excepting a register size difference on really early parts). Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5249sim.h | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'arch/m68k/include/asm/m5249sim.h') diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 2c23a83..36ed31b 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -106,19 +106,6 @@ #define MCFGPIO_PIN_MAX 64 #define MCFGPIO_IRQ_MAX -1 #define MCFGPIO_IRQ_VECBASE -1 -/* - * Macro to set IMR register. It is 32 bits on the 5249. - */ -#define MCFSIM_IMR_MASKALL 0x7fffe /* All SIM intr sources */ - -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) /****************************************************************************/ -- cgit v1.1