From 852fe3105e94ca26d1b3df7e2cb6878ebdd67608 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 28 May 2011 15:27:59 +0100 Subject: MIPS: Malta: Fix crash in SMP kernel on non-CMP systems. Since 6be63bbbdab66b9185dc6f67c8b1bacb6f37f946 (lmo) rsp. af3a1f6f4813907e143f87030cde67a9971db533 (kernel.org) the Malta code does no longer probe for presence of GCMP if CMP is not configured. This means that the variable gcmp_present well be left at its default value of -1 which normally is meant to indicate that GCMP has not yet been mmapped. This non-zero value is now interpreted as GCMP being present resulting in a write attempt to a GCMP register resulting in a crash. Reported and a build fix on top of my fix by Rob Landley . Reported-by: Rob Landley Signed-off-by: Ralf Baechle Patchwork: https://patchwork.linux-mips.org/patch/2413/ --- arch/mips/pmc-sierra/msp71xx/msp_setup.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index 2413ea6..0abfbe0 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -228,13 +228,11 @@ void __init prom_init(void) */ msp_serial_setup(); -#ifdef CONFIG_MIPS_MT_SMP - register_smp_ops(&vsmp_smp_ops); -#endif - + if (register_vsmp_smp_ops()) { #ifdef CONFIG_MIPS_MT_SMTC - register_smp_ops(&msp_smtc_smp_ops); + register_smp_ops(&msp_smtc_smp_ops); #endif + } #ifdef CONFIG_PMCTWILED /* -- cgit v1.1 From 91e8db593c0a2d8249ac00422af1ed42537a3b16 Mon Sep 17 00:00:00 2001 From: Jamie Iles Date: Mon, 15 Aug 2011 10:17:53 +0100 Subject: mips: msp71xx/serial: convert to pr_foo() helpers Convert to pr_foo() helpers rather than printk(KERN_.*). Acked-by: Ralf Baechle Acked-by: Anoop P A Acked-by: Alan Cox Signed-off-by: Jamie Iles Signed-off-by: Greg Kroah-Hartman --- arch/mips/pmc-sierra/msp71xx/msp_serial.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c index f726162..c3247b5 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c @@ -65,7 +65,7 @@ void __init msp_serial_setup(void) up.line = 0; up.private_data = (void*)UART0_STATUS_REG; if (early_serial_setup(&up)) - printk(KERN_ERR "Early serial init of port 0 failed\n"); + pr_err("Early serial init of port 0 failed\n"); /* Initialize the second serial port, if one exists */ switch (mips_machtype) { @@ -89,5 +89,5 @@ void __init msp_serial_setup(void) up.line = 1; up.private_data = (void*)UART1_STATUS_REG; if (early_serial_setup(&up)) - printk(KERN_ERR "Early serial init of port 1 failed\n"); + pr_err("Early serial init of port 1 failed\n"); } -- cgit v1.1 From 03972fc21410907fa20d1442c4b073f034423d5c Mon Sep 17 00:00:00 2001 From: Jamie Iles Date: Mon, 15 Aug 2011 10:17:54 +0100 Subject: mips: msp71xx/serial: add workaround for DW UART The Synopsys DesignWare UART in pmc-sierra msp71xx has an extra feature where the UART detects a write attempt to the LCR whilst busy and raises an interrupt. The driver needs to clear the interrupt and rewrite the LCR. Move this into platform code and out of the 8250 driver. Acked-by: Ralf Baechle Acked-by: Alan Cox Signed-off-by: Jamie Iles Signed-off-by: Greg Kroah-Hartman --- arch/mips/pmc-sierra/msp71xx/msp_serial.c | 69 +++++++++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 4 deletions(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c index c3247b5..a1c7c7d 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -38,6 +39,55 @@ #include #include +struct msp_uart_data { + int last_lcr; +}; + +static void msp_serial_out(struct uart_port *p, int offset, int value) +{ + struct msp_uart_data *d = p->private_data; + + if (offset == UART_LCR) + d->last_lcr = value; + + offset <<= p->regshift; + writeb(value, p->membase + offset); +} + +static unsigned int msp_serial_in(struct uart_port *p, int offset) +{ + offset <<= p->regshift; + + return readb(p->membase + offset); +} + +static int msp_serial_handle_irq(struct uart_port *p) +{ + struct msp_uart_data *d = p->private_data; + unsigned int iir = readb(p->membase + (UART_IIR << p->regshift)); + + if (serial8250_handle_irq(p, iir)) { + return 1; + } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { + /* + * The DesignWare APB UART has an Busy Detect (0x07) interrupt + * meaning an LCR write attempt occurred while the UART was + * busy. The interrupt must be cleared by reading the UART + * status register (USR) and the LCR re-written. + * + * Note: MSP reserves 0x20 bytes of address space for the UART + * and the USR is mapped in a separate block at an offset of + * 0xc0 from the start of the UART. + */ + (void)readb(p->membase + 0xc0); + writeb(d->last_lcr, p->membase + (UART_LCR << p->regshift)); + + return 1; + } + + return 0; +} + void __init msp_serial_setup(void) { char *s; @@ -59,13 +109,22 @@ void __init msp_serial_setup(void) up.irq = MSP_INT_UART0; up.uartclk = uartclk; up.regshift = 2; - up.iotype = UPIO_DWAPB; /* UPIO_MEM like */ + up.iotype = UPIO_MEM; up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; up.type = PORT_16550A; up.line = 0; - up.private_data = (void*)UART0_STATUS_REG; - if (early_serial_setup(&up)) + up.serial_out = msp_serial_out; + up.serial_in = msp_serial_in; + up.handle_irq = msp_serial_handle_irq; + up.private_data = kzalloc(sizeof(struct msp_uart_data), GFP_KERNEL); + if (!up.private_data) { + pr_err("failed to allocate uart private data\n"); + return; + } + if (early_serial_setup(&up)) { + kfree(up.private_data); pr_err("Early serial init of port 0 failed\n"); + } /* Initialize the second serial port, if one exists */ switch (mips_machtype) { @@ -88,6 +147,8 @@ void __init msp_serial_setup(void) up.irq = MSP_INT_UART1; up.line = 1; up.private_data = (void*)UART1_STATUS_REG; - if (early_serial_setup(&up)) + if (early_serial_setup(&up)) { + kfree(up.private_data); pr_err("Early serial init of port 1 failed\n"); + } } -- cgit v1.1 From 5a4a4ad851dd8db2d888fb86c8bd946b2ae79f60 Mon Sep 17 00:00:00 2001 From: Wu Zhangjin Date: Sat, 23 Jul 2011 12:41:24 +0000 Subject: MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin Signed-off-by: Thomas Gleixner Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/msp71xx/msp_irq.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c b/arch/mips/pmc-sierra/msp71xx/msp_irq.c index 4531c4a..42a4c04 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c @@ -109,11 +109,13 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) static struct irqaction cic_cascade_msp = { .handler = no_action, .name = "MSP CIC cascade" + .flags = IRQF_NO_THREAD, }; static struct irqaction per_cascade_msp = { .handler = no_action, .name = "MSP PER cascade" + .flags = IRQF_NO_THREAD, }; void __init arch_init_irq(void) -- cgit v1.1 From a705dc7cf4edbf110af19ea55cb5e5d0465adcf4 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 28 Jul 2011 13:31:48 +0100 Subject: MIPS: MSP71xx: Fix build error. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CC arch/mips/pmc-sierra/msp71xx/msp_irq.o /home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:112:2: error: request for member ‘flags’ in something not a structure or union /home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:118:2: error: request for member ‘flags’ in something not a structure or union make[4]: *** [arch/mips/pmc-sierra/msp71xx/msp_irq.o] Error 1 caused by 57336bc1056798d89714b7fb1b1d197e6bda6819 [MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD]. Commas to separate struct initializers generally are considered useful to enhance the compilation experience of the user. Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/msp71xx/msp_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c b/arch/mips/pmc-sierra/msp71xx/msp_irq.c index 42a4c04..d3c3d81 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c @@ -108,13 +108,13 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) static struct irqaction cic_cascade_msp = { .handler = no_action, - .name = "MSP CIC cascade" + .name = "MSP CIC cascade", .flags = IRQF_NO_THREAD, }; static struct irqaction per_cascade_msp = { .handler = no_action, - .name = "MSP PER cascade" + .name = "MSP PER cascade", .flags = IRQF_NO_THREAD, }; -- cgit v1.1 From b77bb37a2ad7689d9ef8048df9cc30ee770f5a94 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 30 Jun 2011 14:43:14 +0100 Subject: Revert "MIPS: LD/SD o32 macro GAS fix update" This reverts commit 97475f8b42e83be2966aa2d70ab9c98477701c53 (lmo) / 82b89152f00f7ad17844d5614d5011e8d7944ac9 (kernel.org) [MIPS: LD/SD o32 macro GAS fix update]. Turns out this patch is producing many build errors with gcc 4.2. Based on further testing with a test case extracted from the build errors found further build errors and suboptimal generation even in violation of the "R" constraint. To make matters worse, the binutils changes also don't work quite as intended so revert this patch for now. --- arch/mips/pmc-sierra/yosemite/py-console.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/yosemite/py-console.c b/arch/mips/pmc-sierra/yosemite/py-console.c index 434d7b1..b7f1d9c 100644 --- a/arch/mips/pmc-sierra/yosemite/py-console.c +++ b/arch/mips/pmc-sierra/yosemite/py-console.c @@ -65,15 +65,11 @@ static unsigned char readb_outer_space(unsigned long long phys) __asm__ __volatile__ ( " .set mips3 \n" - " .set push \n" - " .set noreorder \n" - " .set nomacro \n" " ld %0, %1 \n" - " .set pop \n" " lbu %0, (%0) \n" " .set mips0 \n" : "=r" (res) - : "R" (vaddr)); + : "m" (vaddr)); write_c0_status(sr); ssnop_4(); @@ -93,15 +89,11 @@ static void writeb_outer_space(unsigned long long phys, unsigned char c) __asm__ __volatile__ ( " .set mips3 \n" - " .set push \n" - " .set noreorder \n" - " .set nomacro \n" " ld %0, %1 \n" - " .set pop \n" " sb %2, (%0) \n" " .set mips0 \n" : "=&r" (tmp) - : "R" (vaddr), "r" (c)); + : "m" (vaddr), "r" (c)); write_c0_status(sr); ssnop_4(); -- cgit v1.1 From 2fd431085cab7a5d0ae4fae91c85c5a05d6afaa0 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 22 Jun 2011 11:14:58 +0100 Subject: MIPS: MSP71xx: Fix build error. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After the recent cleanup of the register_*_smp_ops() functions msp71xx wasn't fixed to include the now necessary header resulting in: /home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c: In function ‘prom_init’: /home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c:231:2: error: implicit declaration of function ‘register_vsmp_smp_ops’ [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/msp71xx/msp_setup.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index 0abfbe0..655308a 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include -- cgit v1.1 From 617d1017545c27a56229483cc1d689eff6c38561 Mon Sep 17 00:00:00 2001 From: Thomas Jarosch Date: Sat, 29 Oct 2011 15:45:56 +0200 Subject: MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check Cause is a misplaced bracket. The code strlen(buf+1) will be two bytes less than strlen(buf)+1 The +1 is in this code to reserve space for an additional space character. [ralf@linux-mips.org: Thomas' original patch fixed the issue only for Yosemite but the same bug exists also in Emma.] Signed-off-by: Thomas Jarosch Patchwork: https://patchwork.linux-mips.org/patch/2861/ Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/yosemite/prom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/pmc-sierra') diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c index cf4c868..dcc926e 100644 --- a/arch/mips/pmc-sierra/yosemite/prom.c +++ b/arch/mips/pmc-sierra/yosemite/prom.c @@ -102,7 +102,7 @@ void __init prom_init(void) /* Get the boot parameters */ for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= + if (strlen(arcs_cmdline) + strlen(arg[i]) + 1 >= sizeof(arcs_cmdline)) break; -- cgit v1.1