From 47952d5ea67dc7098667a954483a82acf81eb4da Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Mar 2006 19:47:52 +0100 Subject: [PATCH] powerpc: use guarded ioremap for cell on-chip mappings I'm not sure where the information came from, but I assumed that doing cache-inhibited mappings for mmio regions was sufficient. It seems we also need the guarded bit set, like everyone else, which is the default for ioremap. Signed-off-by: Arnd Bergmann Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/cell/pervasive.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/platforms/cell/pervasive.c') diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c index e0e051c..58baeb5 100644 --- a/arch/powerpc/platforms/cell/pervasive.c +++ b/arch/powerpc/platforms/cell/pervasive.c @@ -203,7 +203,7 @@ found: pr_debug("pervasive area for CPU %d at %lx, size %x\n", cpu, real_address, size); - p->regs = __ioremap(real_address, size, _PAGE_NO_CACHE); + p->regs = ioremap(real_address, size); p->thread = thread; return 0; } -- cgit v1.1