From 4b3073e1c53a256275f1079c0fbfbe85883d9275 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 18 Dec 2009 16:40:18 +0000 Subject: MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell Acked-by: Benjamin Herrenschmidt Signed-off-by: Russell King --- arch/score/include/asm/pgtable.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/score/include') diff --git a/arch/score/include/asm/pgtable.h b/arch/score/include/asm/pgtable.h index 674934b..ccf38f0 100644 --- a/arch/score/include/asm/pgtable.h +++ b/arch/score/include/asm/pgtable.h @@ -272,8 +272,9 @@ extern void __update_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte); static inline void update_mmu_cache(struct vm_area_struct *vma, - unsigned long address, pte_t pte) + unsigned long address, pte_t *ptep) { + pte_t pte = *ptep; __update_tlb(vma, address, pte); __update_cache(vma, address, pte); } -- cgit v1.1 From dacbe41f776db0a5a9aee1e41594f405c95778a5 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Wed, 10 Mar 2010 15:22:46 -0800 Subject: ptrace: move user_enable_single_step & co prototypes to linux/ptrace.h While in theory user_enable_single_step/user_disable_single_step/ user_enable_blockstep could also be provided as an inline or macro there's no good reason to do so, and having the prototype in one places keeps code size and confusion down. Roland said: The original thought there was that user_enable_single_step() et al might well be only an instruction or three on a sane machine (as if we have any of those!), and since there is only one call site inlining would be beneficial. But I agree that there is no strong reason to care about inlining it. As to the arch changes, there is only one thought I'd add to the record. It was always my thinking that for an arch where PTRACE_SINGLESTEP does text-modifying breakpoint insertion, user_enable_single_step() should not be provided. That is, arch_has_single_step()=>true means that there is an arch facility with "pure" semantics that does not have any unexpected side effects. Inserting a breakpoint might do very unexpected strange things in multi-threaded situations. Aside from that, it is a peculiar side effect that user_{enable,disable}_single_step() should cause COW de-sharing of text pages and so forth. For PTRACE_SINGLESTEP, all these peculiarities are the status quo ante for that arch, so having arch_ptrace() itself do those is one thing. But for building other things in the future, it is nicer to have a uniform "pure" semantics that arch-independent code can expect. OTOH, all such arch issues are really up to the arch maintainer. As of today, there is nothing but ptrace using user_enable_single_step() et al so it's a distinction without a practical difference. If/when there are other facilities that use user_enable_single_step() and might care, the affected arch's can revisit the question when someone cares about the quality of the arch support for said new facility. Signed-off-by: Christoph Hellwig Cc: Oleg Nesterov Cc: Roland McGrath Acked-by: David Howells Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/score/include/asm/ptrace.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/score/include') diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h index d40e691..e89dc9b 100644 --- a/arch/score/include/asm/ptrace.h +++ b/arch/score/include/asm/ptrace.h @@ -90,8 +90,7 @@ extern int read_tsk_short(struct task_struct *, unsigned long, unsigned short *); #define arch_has_single_step() (1) -extern void user_enable_single_step(struct task_struct *); -extern void user_disable_single_step(struct task_struct *); + #endif /* __KERNEL__ */ #endif /* _ASM_SCORE_PTRACE_H */ -- cgit v1.1 From 0ddc9324b1a842afd77e8e86698b1d1d2ffed022 Mon Sep 17 00:00:00 2001 From: Andreas Dilger Date: Fri, 14 May 2010 11:13:27 +0200 Subject: add descriptive comment for TIF_MEMDIE task flag declaration. Signed-off-by: Andreas Dilger Acked-by: KOSAKI Motohiro Signed-off-by: Jiri Kosina --- arch/score/include/asm/thread_info.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/score/include') diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h index 5593999..8570d08 100644 --- a/arch/score/include/asm/thread_info.h +++ b/arch/score/include/asm/thread_info.h @@ -92,7 +92,7 @@ register struct thread_info *__current_thread_info __asm__("r28"); #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ -#define TIF_MEMDIE 18 +#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define _TIF_SYSCALL_TRACE (1< Date: Wed, 26 May 2010 14:44:30 -0700 Subject: asm-generic: remove ISA_DMA_THRESHOLD in scatterlist.h This is the first half of the attempt to use asm-generic/scatterlist.h on every architecture. There are only two ways to define scatterlist structure. So it's easy to convert every architecture to use asm-generic/scatterlist.h. This patch: The trick for ISA_DMA_THRESHOLD in asm-generic/scatterlist.h doesn't work for powerpc. This lets architectures defin ISA_DMA_THRESHOLD. Hopefully, we can remove ISA_DMA_THRESHOLD in the future; we can do better to decide if the bouncing is necessary or not. Signed-off-by: FUJITA Tomonori Cc: Arnd Bergmann Cc: Richard Henderson Cc: Ivan Kokshaysky Cc: Matt Turner Cc: Russell King Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/score/include/asm/scatterlist.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/score/include') diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h index 9f533b8..4fa1a66 100644 --- a/arch/score/include/asm/scatterlist.h +++ b/arch/score/include/asm/scatterlist.h @@ -1,6 +1,8 @@ #ifndef _ASM_SCORE_SCATTERLIST_H #define _ASM_SCORE_SCATTERLIST_H +#define ISA_DMA_THRESHOLD (~0UL) + #include #endif /* _ASM_SCORE_SCATTERLIST_H */ -- cgit v1.1