From 2373f6b9744d5373b886f3ce1a985193cca0a356 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Sat, 29 Oct 2011 10:57:23 +0100 Subject: i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 194 +++++++++++++++++++++++++++++++ 1 file changed, 194 insertions(+) create mode 100644 drivers/i2c/busses/i2c-designware-core.h (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h new file mode 100644 index 0000000..4e37031 --- /dev/null +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -0,0 +1,194 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + */ + +/* + * Registers offset + */ +#define DW_IC_CON 0x0 +#define DW_IC_TAR 0x4 +#define DW_IC_DATA_CMD 0x10 +#define DW_IC_SS_SCL_HCNT 0x14 +#define DW_IC_SS_SCL_LCNT 0x18 +#define DW_IC_FS_SCL_HCNT 0x1c +#define DW_IC_FS_SCL_LCNT 0x20 +#define DW_IC_INTR_STAT 0x2c +#define DW_IC_INTR_MASK 0x30 +#define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c +#define DW_IC_CLR_INTR 0x40 +#define DW_IC_CLR_RX_UNDER 0x44 +#define DW_IC_CLR_RX_OVER 0x48 +#define DW_IC_CLR_TX_OVER 0x4c +#define DW_IC_CLR_RD_REQ 0x50 +#define DW_IC_CLR_TX_ABRT 0x54 +#define DW_IC_CLR_RX_DONE 0x58 +#define DW_IC_CLR_ACTIVITY 0x5c +#define DW_IC_CLR_STOP_DET 0x60 +#define DW_IC_CLR_START_DET 0x64 +#define DW_IC_CLR_GEN_CALL 0x68 +#define DW_IC_ENABLE 0x6c +#define DW_IC_STATUS 0x70 +#define DW_IC_TXFLR 0x74 +#define DW_IC_RXFLR 0x78 +#define DW_IC_TX_ABRT_SOURCE 0x80 +#define DW_IC_COMP_PARAM_1 0xf4 +#define DW_IC_COMP_TYPE 0xfc +#define DW_IC_COMP_TYPE_VALUE 0x44570140 + +#define DW_IC_CON_MASTER 0x1 +#define DW_IC_CON_SPEED_STD 0x2 +#define DW_IC_CON_SPEED_FAST 0x4 +#define DW_IC_CON_10BITADDR_MASTER 0x10 +#define DW_IC_CON_RESTART_EN 0x20 +#define DW_IC_CON_SLAVE_DISABLE 0x40 + +#define DW_IC_INTR_RX_UNDER 0x001 +#define DW_IC_INTR_RX_OVER 0x002 +#define DW_IC_INTR_RX_FULL 0x004 +#define DW_IC_INTR_TX_OVER 0x008 +#define DW_IC_INTR_TX_EMPTY 0x010 +#define DW_IC_INTR_RD_REQ 0x020 +#define DW_IC_INTR_TX_ABRT 0x040 +#define DW_IC_INTR_RX_DONE 0x080 +#define DW_IC_INTR_ACTIVITY 0x100 +#define DW_IC_INTR_STOP_DET 0x200 +#define DW_IC_INTR_START_DET 0x400 +#define DW_IC_INTR_GEN_CALL 0x800 + +#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ + DW_IC_INTR_TX_EMPTY | \ + DW_IC_INTR_TX_ABRT | \ + DW_IC_INTR_STOP_DET) + +#define DW_IC_STATUS_ACTIVITY 0x1 + +#define DW_IC_ERR_TX_ABRT 0x1 + +/* + * status codes + */ +#define STATUS_IDLE 0x0 +#define STATUS_WRITE_IN_PROGRESS 0x1 +#define STATUS_READ_IN_PROGRESS 0x2 + +#define TIMEOUT 20 /* ms */ + +/* + * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register + * + * only expected abort codes are listed here + * refer to the datasheet for the full list + */ +#define ABRT_7B_ADDR_NOACK 0 +#define ABRT_10ADDR1_NOACK 1 +#define ABRT_10ADDR2_NOACK 2 +#define ABRT_TXDATA_NOACK 3 +#define ABRT_GCALL_NOACK 4 +#define ABRT_GCALL_READ 5 +#define ABRT_SBYTE_ACKDET 7 +#define ABRT_SBYTE_NORSTRT 9 +#define ABRT_10B_RD_NORSTRT 10 +#define ABRT_MASTER_DIS 11 +#define ARB_LOST 12 + +#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) +#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) +#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) +#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) +#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) +#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) +#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) +#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) +#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) +#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) +#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) + +#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ + DW_IC_TX_ABRT_10ADDR1_NOACK | \ + DW_IC_TX_ABRT_10ADDR2_NOACK | \ + DW_IC_TX_ABRT_TXDATA_NOACK | \ + DW_IC_TX_ABRT_GCALL_NOACK) +/** + * struct dw_i2c_dev - private i2c-designware data + * @dev: driver model device node + * @base: IO registers pointer + * @cmd_complete: tx completion indicator + * @lock: protect this struct and IO registers + * @clk: input reference clock + * @cmd_err: run time hadware error code + * @msgs: points to an array of messages currently being transfered + * @msgs_num: the number of elements in msgs + * @msg_write_idx: the element index of the current tx message in the msgs + * array + * @tx_buf_len: the length of the current tx buffer + * @tx_buf: the current tx buffer + * @msg_read_idx: the element index of the current rx message in the msgs + * array + * @rx_buf_len: the length of the current rx buffer + * @rx_buf: the current rx buffer + * @msg_err: error status of the current transfer + * @status: i2c master status, one of STATUS_* + * @abort_source: copy of the TX_ABRT_SOURCE register + * @irq: interrupt number for the i2c master + * @adapter: i2c subsystem adapter node + * @tx_fifo_depth: depth of the hardware tx fifo + * @rx_fifo_depth: depth of the hardware rx fifo + */ +struct dw_i2c_dev { + struct device *dev; + void __iomem *base; + struct completion cmd_complete; + struct mutex lock; + struct clk *clk; + int cmd_err; + struct i2c_msg *msgs; + int msgs_num; + int msg_write_idx; + u32 tx_buf_len; + u8 *tx_buf; + int msg_read_idx; + u32 rx_buf_len; + u8 *rx_buf; + int msg_err; + unsigned int status; + u32 abort_source; + int irq; + int swab; + struct i2c_adapter adapter; + unsigned int tx_fifo_depth; + unsigned int rx_fifo_depth; +}; + +extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); +extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); +extern int i2c_dw_init(struct dw_i2c_dev *dev); +extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], + int num); +extern u32 i2c_dw_func(struct i2c_adapter *adap); +extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); -- cgit v1.1 From 1d31b58f648c4f754b23fed4d57acc941080e5ee Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:30 -0700 Subject: i2c-designware: Move retriveving the clock speed out of core code. The clock frequecy supplied to the IP core is specific to a single instance of the driver. This patch makes it possible to have multiple Designware I2C cores in the system possibly running at different core frequencies. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 4e37031..43de340 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -166,6 +166,7 @@ struct dw_i2c_dev { struct completion cmd_complete; struct mutex lock; struct clk *clk; + u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); int cmd_err; struct i2c_msg *msgs; int msgs_num; -- cgit v1.1 From 2fa8326b4b1e5fdc889b57b03b1313f3229cb438 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:31 -0700 Subject: i2c-designware: move i2c functionality bit field to be adapter specific The functionality of the adapter depends on the configuration of the IP block at silicon compile time and is adapter specific. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 43de340..ab4e655 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -182,6 +182,7 @@ struct dw_i2c_dev { int irq; int swab; struct i2c_adapter adapter; + u32 functionality; unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; }; -- cgit v1.1 From e18563fc560aba0d95a5a73145812a081fb38fac Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:32 -0700 Subject: i2c-designware: move controller config to bus specific portion of driver With multiple I2C adapters possible in the system each running at (possibly) different speeds we need to move the controller configuration bit field to the adapter. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index ab4e655..2938621 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -183,6 +183,7 @@ struct dw_i2c_dev { int swab; struct i2c_adapter adapter; u32 functionality; + u32 master_cfg; unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; }; -- cgit v1.1 From f3fa9f3da5621154323775ff0efdba99dcebcee4 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:34 -0700 Subject: i2c-designware: Push all register reads/writes into the core code. Move all register manipulation code into the core, also move register offset definitions to i2c-designware-core.c since the bus specific portions of the driver no longer need/use them. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 104 ++----------------------------- 1 file changed, 5 insertions(+), 99 deletions(-) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 2938621..dc016e2 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -26,40 +26,6 @@ * */ -/* - * Registers offset - */ -#define DW_IC_CON 0x0 -#define DW_IC_TAR 0x4 -#define DW_IC_DATA_CMD 0x10 -#define DW_IC_SS_SCL_HCNT 0x14 -#define DW_IC_SS_SCL_LCNT 0x18 -#define DW_IC_FS_SCL_HCNT 0x1c -#define DW_IC_FS_SCL_LCNT 0x20 -#define DW_IC_INTR_STAT 0x2c -#define DW_IC_INTR_MASK 0x30 -#define DW_IC_RAW_INTR_STAT 0x34 -#define DW_IC_RX_TL 0x38 -#define DW_IC_TX_TL 0x3c -#define DW_IC_CLR_INTR 0x40 -#define DW_IC_CLR_RX_UNDER 0x44 -#define DW_IC_CLR_RX_OVER 0x48 -#define DW_IC_CLR_TX_OVER 0x4c -#define DW_IC_CLR_RD_REQ 0x50 -#define DW_IC_CLR_TX_ABRT 0x54 -#define DW_IC_CLR_RX_DONE 0x58 -#define DW_IC_CLR_ACTIVITY 0x5c -#define DW_IC_CLR_STOP_DET 0x60 -#define DW_IC_CLR_START_DET 0x64 -#define DW_IC_CLR_GEN_CALL 0x68 -#define DW_IC_ENABLE 0x6c -#define DW_IC_STATUS 0x70 -#define DW_IC_TXFLR 0x74 -#define DW_IC_RXFLR 0x78 -#define DW_IC_TX_ABRT_SOURCE 0x80 -#define DW_IC_COMP_PARAM_1 0xf4 -#define DW_IC_COMP_TYPE 0xfc -#define DW_IC_COMP_TYPE_VALUE 0x44570140 #define DW_IC_CON_MASTER 0x1 #define DW_IC_CON_SPEED_STD 0x2 @@ -68,72 +34,7 @@ #define DW_IC_CON_RESTART_EN 0x20 #define DW_IC_CON_SLAVE_DISABLE 0x40 -#define DW_IC_INTR_RX_UNDER 0x001 -#define DW_IC_INTR_RX_OVER 0x002 -#define DW_IC_INTR_RX_FULL 0x004 -#define DW_IC_INTR_TX_OVER 0x008 -#define DW_IC_INTR_TX_EMPTY 0x010 -#define DW_IC_INTR_RD_REQ 0x020 -#define DW_IC_INTR_TX_ABRT 0x040 -#define DW_IC_INTR_RX_DONE 0x080 -#define DW_IC_INTR_ACTIVITY 0x100 -#define DW_IC_INTR_STOP_DET 0x200 -#define DW_IC_INTR_START_DET 0x400 -#define DW_IC_INTR_GEN_CALL 0x800 - -#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ - DW_IC_INTR_TX_EMPTY | \ - DW_IC_INTR_TX_ABRT | \ - DW_IC_INTR_STOP_DET) - -#define DW_IC_STATUS_ACTIVITY 0x1 - -#define DW_IC_ERR_TX_ABRT 0x1 - -/* - * status codes - */ -#define STATUS_IDLE 0x0 -#define STATUS_WRITE_IN_PROGRESS 0x1 -#define STATUS_READ_IN_PROGRESS 0x2 - -#define TIMEOUT 20 /* ms */ - -/* - * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register - * - * only expected abort codes are listed here - * refer to the datasheet for the full list - */ -#define ABRT_7B_ADDR_NOACK 0 -#define ABRT_10ADDR1_NOACK 1 -#define ABRT_10ADDR2_NOACK 2 -#define ABRT_TXDATA_NOACK 3 -#define ABRT_GCALL_NOACK 4 -#define ABRT_GCALL_READ 5 -#define ABRT_SBYTE_ACKDET 7 -#define ABRT_SBYTE_NORSTRT 9 -#define ABRT_10B_RD_NORSTRT 10 -#define ABRT_MASTER_DIS 11 -#define ARB_LOST 12 - -#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) -#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) -#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) -#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) -#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) -#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) -#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) -#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) -#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) -#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) -#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) -#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ - DW_IC_TX_ABRT_10ADDR1_NOACK | \ - DW_IC_TX_ABRT_10ADDR2_NOACK | \ - DW_IC_TX_ABRT_TXDATA_NOACK | \ - DW_IC_TX_ABRT_GCALL_NOACK) /** * struct dw_i2c_dev - private i2c-designware data * @dev: driver model device node @@ -195,3 +96,8 @@ extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num); extern u32 i2c_dw_func(struct i2c_adapter *adap); extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); +extern void i2c_dw_enable(struct dw_i2c_dev *dev); +extern void i2c_dw_disable(struct dw_i2c_dev *dev); +extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); +extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); +extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); -- cgit v1.1 From fe20ff5c7e9ca7f5369aacc7d7ca3efeda3b90fe Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:35 -0700 Subject: i2c-designware: Add support for Designware core behind PCI devices. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index dc016e2..601dd67 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -68,6 +68,7 @@ struct dw_i2c_dev { struct mutex lock; struct clk *clk; u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); + struct dw_pci_controller *controller; int cmd_err; struct i2c_msg *msgs; int msgs_num; -- cgit v1.1 From 18dbdda89f5cf0540e577280395f16079308e87d Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:36 -0700 Subject: i2c-designware: Add runtime power management support Add runtime power management to the PCI driver. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c/busses/i2c-designware-core.h') diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 601dd67..02d1a2d 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -98,6 +98,7 @@ extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], extern u32 i2c_dw_func(struct i2c_adapter *adap); extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); extern void i2c_dw_enable(struct dw_i2c_dev *dev); +extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev); extern void i2c_dw_disable(struct dw_i2c_dev *dev); extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); -- cgit v1.1