From e7549b926dd3ceec048f5689df90d4ec970c9419 Mon Sep 17 00:00:00 2001 From: Wolfgang Wiedmeyer Date: Fri, 23 Oct 2015 13:30:20 +0200 Subject: more driver stuff from 3.2.72 --- drivers/net/wireless/rtlwifi/rtl8192se/hw.c | 84 ++++++++++++++++------------- 1 file changed, 46 insertions(+), 38 deletions(-) (limited to 'drivers/net/wireless/rtlwifi/rtl8192se/hw.c') diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c index 2e9005d..503c160 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c @@ -27,6 +27,8 @@ * *****************************************************************************/ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include "../wifi.h" #include "../efuse.h" #include "../base.h" @@ -465,8 +467,7 @@ static u8 _rtl92ce_halset_sysclk(struct ieee80211_hw *hw, u8 data) if ((tmpvalue & BIT(6))) break; - printk(KERN_ERR "wait for BIT(6) return value %x\n", - tmpvalue); + pr_err("wait for BIT(6) return value %x\n", tmpvalue); if (waitcount == 0) break; @@ -516,7 +517,7 @@ static u8 _rtl92se_rf_onoff_detect(struct ieee80211_hw *hw) mdelay(10); /* check GPIO3 */ - u1tmp = rtl_read_byte(rtlpriv, GPIO_IN); + u1tmp = rtl_read_byte(rtlpriv, GPIO_IN_SE); retval = (u1tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? ERFON : ERFOFF; return retval; @@ -884,12 +885,10 @@ static void _rtl92se_hw_configure(struct ieee80211_hw *hw) struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); u8 reg_bw_opmode = 0; - u32 reg_ratr = 0, reg_rrsr = 0; + u32 reg_rrsr = 0; u8 regtmp = 0; reg_bw_opmode = BW_OPMODE_20MHZ; - reg_ratr = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | - RATE_ALL_OFDM_2SS; reg_rrsr = RATE_ALL_CCK | RATE_ALL_OFDM_AG; regtmp = rtl_read_byte(rtlpriv, INIRTSMCS_SEL); @@ -925,7 +924,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); u8 tmp_byte = 0; - + unsigned long flags; bool rtstatus = true; u8 tmp_u1b; int err = false; @@ -937,6 +936,16 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) rtlpci->being_init_adapter = true; + /* As this function can take a very long time (up to 350 ms) + * and can be called with irqs disabled, reenable the irqs + * to let the other devices continue being serviced. + * + * It is safe doing so since our own interrupts will only be enabled + * in a subsequent step. + */ + local_save_flags(flags); + local_irq_enable(); + rtlpriv->intf_ops->disable_aspm(hw); /* 1. MAC Initialize */ @@ -970,7 +979,8 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) /* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */ if (rtl92s_phy_mac_config(hw) != true) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("MAC Config failed\n")); - return rtstatus; + err = rtstatus; + goto exit; } /* Make sure BB/RF write OK. We should prevent enter IPS. radio off. */ @@ -980,7 +990,8 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) /* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */ if (rtl92s_phy_bb_config(hw) != true) { RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, ("BB Config failed\n")); - return rtstatus; + err = rtstatus; + goto exit; } /* 5. Initiailze RF RAIO_A.txt RF RAIO_B.txt */ @@ -996,7 +1007,8 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) rtlpriv->psc.rfoff_reason = RF_CHANGE_BY_INIT; rtlpriv->psc.rfpwr_state = ERFON; - rtl_ps_set_rf_state(hw, ERFOFF, rfoffreason, true); + /* FIXME: check spinlocks if this block is uncommented */ + rtl_ps_set_rf_state(hw, ERFOFF, rfoffreason); } else { /* gpio radio on/off is out of adapter start */ if (rtlpriv->psc.hwradiooff == false) { @@ -1015,7 +1027,8 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) if (rtl92s_phy_rf_config(hw) != true) { RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("RF Config failed\n")); - return rtstatus; + err = rtstatus; + goto exit; } /* After read predefined TXT, we must set BB/MAC/RF @@ -1089,8 +1102,9 @@ int rtl92se_hw_init(struct ieee80211_hw *hw) rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_ON); rtl92s_dm_init(hw); +exit: + local_irq_restore(flags); rtlpci->being_init_adapter = false; - return err; } @@ -1107,7 +1121,7 @@ void rtl92se_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid) if (rtlpriv->psc.rfpwr_state != ERFON) return; - if (check_bssid == true) { + if (check_bssid) { reg_rcr |= (RCR_CBSSID); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); } else if (check_bssid == false) { @@ -1122,14 +1136,12 @@ static int _rtl92se_set_media_status(struct ieee80211_hw *hw, { struct rtl_priv *rtlpriv = rtl_priv(hw); u8 bt_msr = rtl_read_byte(rtlpriv, MSR); - enum led_ctl_mode ledaction = LED_CTL_NO_LINK; u32 temp; bt_msr &= ~MSR_LINK_MASK; switch (type) { case NL80211_IFTYPE_UNSPECIFIED: bt_msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); - ledaction = LED_CTL_LINK; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Set Network type to NO LINK!\n")); break; @@ -1140,7 +1152,6 @@ static int _rtl92se_set_media_status(struct ieee80211_hw *hw, break; case NL80211_IFTYPE_STATION: bt_msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT); - ledaction = LED_CTL_LINK; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Set Network type to STA!\n")); break; @@ -1218,8 +1229,6 @@ void rtl92se_enable_interrupt(struct ieee80211_hw *hw) rtl_write_dword(rtlpriv, INTA_MASK, rtlpci->irq_mask[0]); /* Support Bit 32-37(Assign as Bit 0-5) interrupt setting now */ rtl_write_dword(rtlpriv, INTA_MASK + 4, rtlpci->irq_mask[1] & 0x3F); - - rtlpci->irq_enabled = true; } void rtl92se_disable_interrupt(struct ieee80211_hw *hw) @@ -1230,7 +1239,7 @@ void rtl92se_disable_interrupt(struct ieee80211_hw *hw) rtl_write_dword(rtlpriv, INTA_MASK, 0); rtl_write_dword(rtlpriv, INTA_MASK + 4, 0); - rtlpci->irq_enabled = false; + synchronize_irq(rtlpci->pdev->irq); } @@ -1261,8 +1270,7 @@ static u8 _rtl92s_set_sysclk(struct ieee80211_hw *hw, u8 data) if ((tmp & BIT(6))) break; - printk(KERN_ERR "wait for BIT(6) return value %x\n", - tmp); + pr_err("wait for BIT(6) return value %x\n", tmp); if (waitcnt == 0) break; @@ -1321,7 +1329,7 @@ static void _rtl92s_phy_set_rfhalt(struct ieee80211_hw *hw) if (u1btmp & BIT(7)) { u1btmp &= ~(BIT(6) | BIT(7)); if (!_rtl92s_set_sysclk(hw, u1btmp)) { - printk(KERN_ERR "Switch ctrl path fail\n"); + pr_err("Switch ctrl path fail\n"); return; } } @@ -1388,7 +1396,7 @@ static void _rtl92se_power_domain_init(struct ieee80211_hw *hw) rtl_write_byte(rtlpriv, LDOA15_CTRL, 0x34); /* Reset MAC-IO and CPU and Core Digital BIT10/11/15 */ - tmpu1b = rtl_read_byte(rtlpriv, SYS_FUNC_EN + 1); + tmpu1b = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1); /* If IPS we need to turn LED on. So we not * not disable BIT 3/7 of reg3. */ @@ -1397,7 +1405,7 @@ static void _rtl92se_power_domain_init(struct ieee80211_hw *hw) else tmpu1b &= 0x73; - rtl_write_byte(rtlpriv, SYS_FUNC_EN + 1, tmpu1b); + rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmpu1b); /* wait for BIT 10/11/15 to pull high automatically!! */ mdelay(1); @@ -1434,15 +1442,15 @@ static void _rtl92se_power_domain_init(struct ieee80211_hw *hw) rtl_write_byte(rtlpriv, LDOA15_CTRL, (tmpu1b | BIT(0))); /* Set Digital Vdd to Retention isolation Path. */ - tmpu2b = rtl_read_word(rtlpriv, SYS_ISO_CTRL); - rtl_write_word(rtlpriv, SYS_ISO_CTRL, (tmpu2b | BIT(11))); + tmpu2b = rtl_read_word(rtlpriv, REG_SYS_ISO_CTRL); + rtl_write_word(rtlpriv, REG_SYS_ISO_CTRL, (tmpu2b | BIT(11))); /* For warm reboot NIC disappera bug. */ - tmpu2b = rtl_read_word(rtlpriv, SYS_FUNC_EN); - rtl_write_word(rtlpriv, SYS_FUNC_EN, (tmpu2b | BIT(13))); + tmpu2b = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); + rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (tmpu2b | BIT(13))); - rtl_write_byte(rtlpriv, SYS_ISO_CTRL + 1, 0x68); + rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x68); /* Enable AFE PLL Macro Block */ tmpu1b = rtl_read_byte(rtlpriv, AFE_PLL_CTRL); @@ -1453,17 +1461,17 @@ static void _rtl92se_power_domain_init(struct ieee80211_hw *hw) mdelay(1); /* Release isolation AFE PLL & MD */ - rtl_write_byte(rtlpriv, SYS_ISO_CTRL, 0xA6); + rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, 0xA6); /* Enable MAC clock */ tmpu2b = rtl_read_word(rtlpriv, SYS_CLKR); rtl_write_word(rtlpriv, SYS_CLKR, (tmpu2b | BIT(12) | BIT(11))); /* Enable Core digital and enable IOREG R/W */ - tmpu2b = rtl_read_word(rtlpriv, SYS_FUNC_EN); - rtl_write_word(rtlpriv, SYS_FUNC_EN, (tmpu2b | BIT(11))); + tmpu2b = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); + rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (tmpu2b | BIT(11))); /* enable REG_EN */ - rtl_write_word(rtlpriv, SYS_FUNC_EN, (tmpu2b | BIT(11) | BIT(15))); + rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (tmpu2b | BIT(11) | BIT(15))); /* Switch the control path. */ tmpu2b = rtl_read_word(rtlpriv, SYS_CLKR); @@ -1655,7 +1663,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw) rtlefuse->autoload_failflag = false; } - if (rtlefuse->autoload_failflag == true) + if (rtlefuse->autoload_failflag) return; _rtl8192se_get_IC_Inferiority(hw); @@ -1688,7 +1696,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw) rtl_write_byte(rtlpriv, MACIDR0 + i, rtlefuse->dev_addr[i]); RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, - (MAC_FMT "\n", MAC_ARG(rtlefuse->dev_addr))); + ("%pM\n", rtlefuse->dev_addr)); /* Get Tx Power Level by Channel */ /* Read Tx power of Channel 1 ~ 14 from EEPROM. */ @@ -2271,7 +2279,7 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid) struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); - enum rf_pwrstate rfpwr_toset, cur_rfstate; + enum rf_pwrstate rfpwr_toset /*, cur_rfstate */; unsigned long flag = 0; bool actuallyset = false; bool turnonbypowerdomain = false; @@ -2292,7 +2300,7 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid) spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); } - cur_rfstate = ppsc->rfpwr_state; + /* cur_rfstate = ppsc->rfpwr_state;*/ /* because after _rtl92s_phy_set_rfhalt, all power * closed, so we must open some power for GPIO check, @@ -2305,7 +2313,7 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid) rfpwr_toset = _rtl92se_rf_onoff_detect(hw); - if ((ppsc->hwradiooff == true) && (rfpwr_toset == ERFON)) { + if ((ppsc->hwradiooff) && (rfpwr_toset == ERFON)) { RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, ("RFKILL-HW Radio ON, RF ON\n")); -- cgit v1.1