From f278ea849e15147269190e943937fa82e66078b1 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 19 Nov 2010 16:40:35 +0900 Subject: sh: clkfwk: Build fix for non-legacy CPG changes. The disabling of the init op for non-legacy clocks neglected to do the same in the core clock framework, resulting in a build failure. Fix it up. Reported-by: Guennadi Liakhovetski Signed-off-by: Paul Mundt --- drivers/sh/clk/core.c | 3 +++ drivers/sh/clk/cpg.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/sh') diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c index 87743e7..3f5e387 100644 --- a/drivers/sh/clk/core.c +++ b/drivers/sh/clk/core.c @@ -418,8 +418,11 @@ int clk_register(struct clk *clk) list_add(&clk->sibling, &root_clks); list_add(&clk->node, &clock_list); + +#ifdef CONFIG_SH_CLK_CPG_LEGACY if (clk->ops && clk->ops->init) clk->ops->init(clk); +#endif out_unlock: mutex_unlock(&clock_list_sem); diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c index 359e9a3..6172335 100644 --- a/drivers/sh/clk/cpg.c +++ b/drivers/sh/clk/cpg.c @@ -131,7 +131,7 @@ static int sh_clk_div6_enable(struct clk *clk) unsigned long value; int ret; - ret = sh_clk_div6_set_rate(clk, clk->rate, 0); + ret = sh_clk_div6_set_rate(clk, clk->rate); if (ret == 0) { value = __raw_readl(clk->enable_reg); value &= ~0x100; /* clear stop bit to enable clock */ -- cgit v1.1