/* * Structure used by apps whose drivers access SDIO drivers. * Pulled out separately so dhdu and wlu can both use it. * * Copyright (C) 1999-2012, Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you * under the terms of the GNU General Public License version 2 (the "GPL"), * available at http://www.broadcom.com/licenses/GPLv2.php, with the * following added to such license: * * As a special exception, the copyright holders of this software give you * permission to link this software with independent modules, and to copy and * distribute the resulting executable under terms of your choice, provided that * you also meet, for each linked independent module, the terms and conditions of * the license of that module. An independent module is a module which is not * derived from this software. The special exception does not apply to any * modifications of the software. * * Notwithstanding the above, under no circumstances may you combine this * software in any way with any other Broadcom software provided under a license * other than the GPL, without Broadcom's express prior written consent. * * $Id: sdiovar.h 241182 2011-02-17 21:50:03Z $ */ #ifndef _sdiovar_h_ #define _sdiovar_h_ #include /* require default structure packing */ #define BWL_DEFAULT_PACKING #include typedef struct sdreg { int func; int offset; int value; } sdreg_t; /* Common msglevel constants */ #define SDH_ERROR_VAL 0x0001 /* Error */ #define SDH_TRACE_VAL 0x0002 /* Trace */ #define SDH_INFO_VAL 0x0004 /* Info */ #define SDH_DEBUG_VAL 0x0008 /* Debug */ #define SDH_DATA_VAL 0x0010 /* Data */ #define SDH_CTRL_VAL 0x0020 /* Control Regs */ #define SDH_LOG_VAL 0x0040 /* Enable bcmlog */ #define SDH_DMA_VAL 0x0080 /* DMA */ #define NUM_PREV_TRANSACTIONS 16 #ifdef BCMSPI /* Error statistics for gSPI */ struct spierrstats_t { uint32 dna; /* The requested data is not available. */ uint32 rdunderflow; /* FIFO underflow happened due to current (F2, F3) rd command */ uint32 wroverflow; /* FIFO underflow happened due to current (F1, F2, F3) wr command */ uint32 f2interrupt; /* OR of all F2 related intr status bits. */ uint32 f3interrupt; /* OR of all F3 related intr status bits. */ uint32 f2rxnotready; /* F2 FIFO is not ready to receive data (FIFO empty) */ uint32 f3rxnotready; /* F3 FIFO is not ready to receive data (FIFO empty) */ uint32 hostcmddataerr; /* Error in command or host data, detected by CRC/checksum * (optional) */ uint32 f2pktavailable; /* Packet is available in F2 TX FIFO */ uint32 f3pktavailable; /* Packet is available in F2 TX FIFO */ uint32 dstatus[NUM_PREV_TRANSACTIONS]; /* dstatus bits of last 16 gSPI transactions */ uint32 spicmd[NUM_PREV_TRANSACTIONS]; }; #endif /* BCMSPI */ #include #endif /* _sdiovar_h_ */