aboutsummaryrefslogtreecommitdiffstats
path: root/arch/cris/arch-v32/kernel/smp.c
blob: 0b99df72d2a460992978256eacf8b48c6f56d180 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
#include <linux/types.h>
#include <asm/delay.h>
#include <irq.h>
#include <hwregs/intr_vect.h>
#include <hwregs/intr_vect_defs.h>
#include <asm/tlbflush.h>
#include <asm/mmu_context.h>
#include <hwregs/asm/mmu_defs_asm.h>
#include <hwregs/supp_reg.h>
#include <linux/atomic.h>

#include <linux/err.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/cpumask.h>
#include <linux/interrupt.h>
#include <linux/module.h>

#define IPI_SCHEDULE 1
#define IPI_CALL 2
#define IPI_FLUSH_TLB 4
#define IPI_BOOT 8

#define FLUSH_ALL (void*)0xffffffff

/* Vector of locks used for various atomic operations */
spinlock_t cris_atomic_locks[] = {
	[0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks)
};

/* CPU masks */
cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
EXPORT_SYMBOL(phys_cpu_present_map);

/* Variables used during SMP boot */
volatile int cpu_now_booting = 0;
volatile struct thread_info *smp_init_current_idle_thread;

/* Variables used during IPI */
static DEFINE_SPINLOCK(call_lock);
static DEFINE_SPINLOCK(tlbstate_lock);

struct call_data_struct {
	void (*func) (void *info);
	void *info;
	int wait;
};

static struct call_data_struct * call_data;

static struct mm_struct* flush_mm;
static struct vm_area_struct* flush_vma;
static unsigned long flush_addr;

/* Mode registers */
static unsigned long irq_regs[NR_CPUS] = {
  regi_irq,
  regi_irq2
};

static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
static struct irqaction irq_ipi  = {
	.handler = crisv32_ipi_interrupt,
	.flags = IRQF_DISABLED,
	.name = "ipi",
};

extern void cris_mmu_init(void);
extern void cris_timer_init(void);

/* SMP initialization */
void __init smp_prepare_cpus(unsigned int max_cpus)
{
	int i;

	/* From now on we can expect IPIs so set them up */
	setup_irq(IPI_INTR_VECT, &irq_ipi);

	/* Mark all possible CPUs as present */
	for (i = 0; i < max_cpus; i++)
		cpumask_set_cpu(i, &phys_cpu_present_map);
}

void __devinit smp_prepare_boot_cpu(void)
{
	/* PGD pointer has moved after per_cpu initialization so
	 * update the MMU.
	 */
  	pgd_t **pgd;
	pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());

	SUPP_BANK_SEL(1);
	SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
	SUPP_BANK_SEL(2);
	SUPP_REG_WR(RW_MM_TLB_PGD, pgd);

	set_cpu_online(0, true);
	cpumask_set_cpu(0, &phys_cpu_present_map);
	set_cpu_possible(0, true);
}

void __init smp_cpus_done(unsigned int max_cpus)
{
}

/* Bring one cpu online.*/
static int __init
smp_boot_one_cpu(int cpuid)
{
	unsigned timeout;
	struct task_struct *idle;
	cpumask_t cpu_mask;

	cpumask_clear(&cpu_mask);
	idle = fork_idle(cpuid);
	if (IS_ERR(idle))
		panic("SMP: fork failed for CPU:%d", cpuid);

	task_thread_info(idle)->cpu = cpuid;

	/* Information to the CPU that is about to boot */
	smp_init_current_idle_thread = task_thread_info(idle);
	cpu_now_booting = cpuid;

	/* Kick it */
	set_cpu_online(cpuid, true);
	cpumask_set_cpu(cpuid, &cpu_mask);
	send_ipi(IPI_BOOT, 0, cpu_mask);
	set_cpu_online(cpuid, false);

	/* Wait for CPU to come online */
	for (timeout = 0; timeout < 10000; timeout++) {
		if(cpu_online(cpuid)) {
			cpu_now_booting = 0;
			smp_init_current_idle_thread = NULL;
			return 0; /* CPU online */
		}
		udelay(100);
		barrier();
	}

	put_task_struct(idle);
	idle = NULL;

	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
	return -1;
}

/* Secondary CPUs starts using C here. Here we need to setup CPU
 * specific stuff such as the local timer and the MMU. */
void __init smp_callin(void)
{
	extern void cpu_idle(void);

	int cpu = cpu_now_booting;
	reg_intr_vect_rw_mask vect_mask = {0};

	/* Initialise the idle task for this CPU */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;

	/* Set up MMU */
	cris_mmu_init();
	__flush_tlb_all();

	/* Setup local timer. */
	cris_timer_init();

	/* Enable IRQ and idle */
	REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
	crisv32_unmask_irq(IPI_INTR_VECT);
	crisv32_unmask_irq(TIMER0_INTR_VECT);
	preempt_disable();
	notify_cpu_starting(cpu);
	local_irq_enable();

	set_cpu_online(cpu, true);
	cpu_idle();
}

/* Stop execution on this CPU.*/
void stop_this_cpu(void* dummy)
{
	local_irq_disable();
	asm volatile("halt");
}

/* Other calls */
void smp_send_stop(void)
{
	smp_call_function(stop_this_cpu, NULL, 0);
}

int setup_profiling_timer(unsigned int multiplier)
{
	return -EINVAL;
}


/* cache_decay_ticks is used by the scheduler to decide if a process
 * is "hot" on one CPU. A higher value means a higher penalty to move
 * a process to another CPU. Our cache is rather small so we report
 * 1 tick.
 */
unsigned long cache_decay_ticks = 1;

int __cpuinit __cpu_up(unsigned int cpu)
{
	smp_boot_one_cpu(cpu);
	return cpu_online(cpu) ? 0 : -ENOSYS;
}

void smp_send_reschedule(int cpu)
{
	cpumask_t cpu_mask;
	cpumask_clear(&cpu_mask);
	cpumask_set_cpu(cpu, &cpu_mask);
	send_ipi(IPI_SCHEDULE, 0, cpu_mask);
}

/* TLB flushing
 *
 * Flush needs to be done on the local CPU and on any other CPU that
 * may have the same mapping. The mm->cpu_vm_mask is used to keep track
 * of which CPUs that a specific process has been executed on.
 */
void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
{
	unsigned long flags;
	cpumask_t cpu_mask;

	spin_lock_irqsave(&tlbstate_lock, flags);
	cpu_mask = (mm == FLUSH_ALL ? cpu_all_mask : *mm_cpumask(mm));
	cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
	flush_mm = mm;
	flush_vma = vma;
	flush_addr = addr;
	send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
	spin_unlock_irqrestore(&tlbstate_lock, flags);
}

void flush_tlb_all(void)
{
	__flush_tlb_all();
	flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
}

void flush_tlb_mm(struct mm_struct *mm)
{
	__flush_tlb_mm(mm);
	flush_tlb_common(mm, FLUSH_ALL, 0);
	/* No more mappings in other CPUs */
	cpumask_clear(mm_cpumask(mm));
	cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
}

void flush_tlb_page(struct vm_area_struct *vma,
			   unsigned long addr)
{
	__flush_tlb_page(vma, addr);
	flush_tlb_common(vma->vm_mm, vma, addr);
}

/* Inter processor interrupts
 *
 * The IPIs are used for:
 *   * Force a schedule on a CPU
 *   * FLush TLB on other CPUs
 *   * Call a function on other CPUs
 */

int send_ipi(int vector, int wait, cpumask_t cpu_mask)
{
	int i = 0;
	reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
	int ret = 0;

	/* Calculate CPUs to send to. */
	cpumask_and(&cpu_mask, &cpu_mask, cpu_online_mask);

	/* Send the IPI. */
	for_each_cpu(i, &cpu_mask)
	{
		ipi.vector |= vector;
		REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
	}

	/* Wait for IPI to finish on other CPUS */
	if (wait) {
		for_each_cpu(i, &cpu_mask) {
                        int j;
                        for (j = 0 ; j < 1000; j++) {
				ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
				if (!ipi.vector)
					break;
				udelay(100);
			}

			/* Timeout? */
			if (ipi.vector) {
				printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
				ret = -ETIMEDOUT;
				dump_stack();
			}
		}
	}
	return ret;
}

/*
 * You must not call this function with disabled interrupts or from a
 * hardware interrupt handler or from a bottom half handler.
 */
int smp_call_function(void (*func)(void *info), void *info, int wait)
{
	cpumask_t cpu_mask;
	struct call_data_struct data;
	int ret;

	cpumask_setall(&cpu_mask);
	cpumask_clear_cpu(smp_processor_id(), &cpu_mask);

	WARN_ON(irqs_disabled());

	data.func = func;
	data.info = info;
	data.wait = wait;

	spin_lock(&call_lock);
	call_data = &data;
	ret = send_ipi(IPI_CALL, wait, cpu_mask);
	spin_unlock(&call_lock);

	return ret;
}

irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
{
	void (*func) (void *info) = call_data->func;
	void *info = call_data->info;
	reg_intr_vect_rw_ipi ipi;

	ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);

	if (ipi.vector & IPI_SCHEDULE) {
		scheduler_ipi();
	}
	if (ipi.vector & IPI_CALL) {
		func(info);
	}
	if (ipi.vector & IPI_FLUSH_TLB) {
		if (flush_mm == FLUSH_ALL)
			__flush_tlb_all();
		else if (flush_vma == FLUSH_ALL)
			__flush_tlb_mm(flush_mm);
		else
			__flush_tlb_page(flush_vma, flush_addr);
	}

	ipi.vector = 0;
	REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);

	return IRQ_HANDLED;
}