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| author | nikolay serdjuk <nikolay.y.serdjuk@intel.com> | 2015-03-27 16:32:27 +0600 |
|---|---|---|
| committer | nikolay serdjuk <nikolay.y.serdjuk@intel.com> | 2015-04-07 11:42:00 +0600 |
| commit | bd4e6a828fc4aefea7d34a1bbedb81c560c60b6b (patch) | |
| tree | 980f9eaa46f3368927e70c0122c9542b92e3368e /disassembler | |
| parent | a68a7cf8f3a6fef22d71a14350176115cb13857f (diff) | |
| download | art-bd4e6a828fc4aefea7d34a1bbedb81c560c60b6b.zip art-bd4e6a828fc4aefea7d34a1bbedb81c560c60b6b.tar.gz art-bd4e6a828fc4aefea7d34a1bbedb81c560c60b6b.tar.bz2 | |
Fix for incorrect parse of PEXTRW instruction
The instruction PEXTRW encoded by sequence 66 0F C5 has form:
PEXTRW reg, xmm, imm8. Its reg is encoded in the REG part and
xmm is encoded in the R/M part of ModR/M byte. Since the order
is opposite to the PEXTRB and PEXTRD, we have to set 'load' to
true and 'store' leave as false.
Change-Id: I32c42ea005eec29f7bf969f275c36ffa0a95fa6d
Diffstat (limited to 'disassembler')
| -rw-r--r-- | disassembler/disassembler_x86.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc index a1834e1..ba0c0bd 100644 --- a/disassembler/disassembler_x86.cc +++ b/disassembler/disassembler_x86.cc @@ -942,7 +942,7 @@ DISASSEMBLER_ENTRY(cmp, opcode1 = "pextrw"; prefix[2] = 0; has_modrm = true; - store = true; + load = true; src_reg_file = SSE; immediate_bytes = 1; } else { |