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| author | Prachee Ramsinghani <pracheer@codeaurora.org> | 2011-05-23 17:33:15 +0530 |
|---|---|---|
| committer | Prachee Ramsinghani <pracheer@codeaurora.org> | 2011-06-01 18:11:17 +0530 |
| commit | 628a9221c0d10574d55dd02ea19f284139b706d8 (patch) | |
| tree | d0ee5a22d18dbedae3f73d8e2d5716bfa80606eb /libc/Android.mk | |
| parent | 1c7a9c9c8fccb2636593a752205f6d3e8d37ce01 (diff) | |
| download | bionic-628a9221c0d10574d55dd02ea19f284139b706d8.zip bionic-628a9221c0d10574d55dd02ea19f284139b706d8.tar.gz bionic-628a9221c0d10574d55dd02ea19f284139b706d8.tar.bz2 | |
msm7627A: Enable 7627A specific memcpy routine
Cache line size for 7627A is 32 bytes. The existing memcpy routine
gives sub-optimal performance for this cache line size. The memcpy
routine has been optimized taking this into consideration. Currently
7627A is the only ARM-v7 target with cache line size of 32 bytes,
hence this optimized code has been featurized under
CORTEX_CACHE_LINE_32 in memcpy.S, which can be enabled by defining
TARGET_CORTEX_CACHE_LINE_32 in BoardConfig.mk
This change also adds corresponding cflag definition in Android.mk.
Change-Id: I984e8fbb6fa7f32ccfa2264809f1668f7633cb99
Diffstat (limited to 'libc/Android.mk')
| -rw-r--r-- | libc/Android.mk | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/libc/Android.mk b/libc/Android.mk index dcd7ba4..6a8034a 100644 --- a/libc/Android.mk +++ b/libc/Android.mk @@ -511,6 +511,10 @@ ifeq ($(TARGET_ARCH),arm) libc_common_cflags += -DPLDSIZE=$(TARGET_SCORPION_BIONIC_PLDSIZE) endif endif + + ifeq ($(TARGET_CORTEX_CACHE_LINE_32),true) + libc_common_cflags += -DCORTEX_CACHE_LINE_32 + endif else # !arm ifeq ($(TARGET_ARCH),x86) libc_crt_target_cflags := -m32 |