summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authordeanm@chromium.org <deanm@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2009-07-27 21:17:23 +0000
committerdeanm@chromium.org <deanm@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2009-07-27 21:17:23 +0000
commit616f9a1ec13b57aa1d6ca18a2b919cdaed41764a (patch)
treed252135ac55ccd9be85efbc945bb21b20fa230e9
parent6a97494def7709561e5874c53e797243c95cb7d5 (diff)
downloadchromium_src-616f9a1ec13b57aa1d6ca18a2b919cdaed41764a.zip
chromium_src-616f9a1ec13b57aa1d6ca18a2b919cdaed41764a.tar.gz
chromium_src-616f9a1ec13b57aa1d6ca18a2b919cdaed41764a.tar.bz2
Some base/ progress towards building on Linux x86-64.
- Use long for int64 (still 64 bits) to avoid annoying nspr clash. - Fix some incorrect define guards and add some functions to atomicops. Review URL: http://codereview.chromium.org/159428 git-svn-id: svn://svn.chromium.org/chrome/trunk/src@21709 0039d316-1c4b-4281-b951-d872f2087c98
-rw-r--r--base/atomicops.h10
-rw-r--r--base/atomicops_internals_x86_gcc.h17
-rw-r--r--base/basictypes.h13
3 files changed, 36 insertions, 4 deletions
diff --git a/base/atomicops.h b/base/atomicops.h
index 728b39b..e8de374 100644
--- a/base/atomicops.h
+++ b/base/atomicops.h
@@ -39,8 +39,10 @@ namespace subtle {
#define __w64
#endif
typedef __w64 int32 Atomic32;
-#ifdef CPU_ARCH_64_BITS
-typedef int64 Atomic64;
+#ifdef ARCH_CPU_64_BITS
+// We need to be able to go between Atomic64 and AtomicWord implicitly. This
+// means Atomic64 and AtomicWord should be the same type on 64-bit.
+typedef intptr_t Atomic64;
#endif
// Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or
@@ -98,7 +100,7 @@ Atomic32 Acquire_Load(volatile const Atomic32* ptr);
Atomic32 Release_Load(volatile const Atomic32* ptr);
// 64-bit atomic operations (only available on 64-bit processors).
-#ifdef CPU_ARCH_64_BITS
+#ifdef ARCH_CPU_64_BITS
Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
Atomic64 old_value,
Atomic64 new_value);
@@ -118,7 +120,7 @@ void Release_Store(volatile Atomic64* ptr, Atomic64 value);
Atomic64 NoBarrier_Load(volatile const Atomic64* ptr);
Atomic64 Acquire_Load(volatile const Atomic64* ptr);
Atomic64 Release_Load(volatile const Atomic64* ptr);
-#endif // CPU_ARCH_64_BITS
+#endif // ARCH_CPU_64_BITS
} // namespace base::subtle
} // namespace base
diff --git a/base/atomicops_internals_x86_gcc.h b/base/atomicops_internals_x86_gcc.h
index f523f6f7..002734b2b 100644
--- a/base/atomicops_internals_x86_gcc.h
+++ b/base/atomicops_internals_x86_gcc.h
@@ -238,6 +238,23 @@ inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
MemoryBarrier();
return *ptr;
}
+
+inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
+ Atomic64 old_value,
+ Atomic64 new_value) {
+ Atomic64 x = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+ if (AtomicOps_Internalx86CPUFeatures.has_amd_lock_mb_bug) {
+ __asm__ __volatile__("lfence" : : : "memory");
+ }
+ return x;
+}
+
+inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
+ Atomic64 old_value,
+ Atomic64 new_value) {
+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+}
+
#endif // defined(__x86_64__)
} // namespace base::subtle
diff --git a/base/basictypes.h b/base/basictypes.h
index ae87fc0..1e44303 100644
--- a/base/basictypes.h
+++ b/base/basictypes.h
@@ -25,7 +25,14 @@ typedef short int16;
#define _INT32
typedef int int32;
#endif
+
+// The NSPR system headers define 64-bit as |long| when possible. In order to
+// not have typedef mismatches, we do the same on LP64.
+#if __LP64__
+typedef long int64;
+#else
typedef long long int64;
+#endif
// NOTE: unsigned types are DANGEROUS in loops and other arithmetical
// places. Use the signed types unless your variable represents a bit
@@ -41,7 +48,13 @@ typedef unsigned short uint16;
#define _UINT32
typedef unsigned int uint32;
#endif
+
+// See the comment above about NSPR and 64-bit.
+#if __LP64__
+typedef unsigned long uint64;
+#else
typedef unsigned long long uint64;
+#endif
// A type to represent a Unicode code-point value. As of Unicode 4.0,
// such values require up to 21 bits.