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authorfbarchard <fbarchard@google.com>2015-10-06 10:42:10 -0700
committerCommit bot <commit-bot@chromium.org>2015-10-06 17:44:05 +0000
commitf813a0ed01c87777a9ed65e5463e0d8cde4657d4 (patch)
tree5231237be3543b540866102bcbc974e4772754d0
parent256b50a90dc439782693f8bc614f69dc295d6b01 (diff)
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Remove cpu.has_avx_hardware()
Update NSS to remove work around cpu detection bug in nss 3.15 BUG=chromium:320524 Review URL: https://codereview.chromium.org/1381603004 Cr-Commit-Position: refs/heads/master@{#352633}
-rw-r--r--base/cpu.cc5
-rw-r--r--base/cpu.h7
-rw-r--r--crypto/nss_util.cc18
3 files changed, 1 insertions, 29 deletions
diff --git a/base/cpu.cc b/base/cpu.cc
index edba2c2..ecffb86 100644
--- a/base/cpu.cc
+++ b/base/cpu.cc
@@ -43,7 +43,6 @@ CPU::CPU()
has_sse41_(false),
has_sse42_(false),
has_avx_(false),
- has_avx_hardware_(false),
has_avx2_(false),
has_aesni_(false),
has_non_stop_time_stamp_counter_(false),
@@ -232,8 +231,6 @@ void CPU::Initialize() {
has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
- has_avx_hardware_ =
- (cpu_info[2] & 0x10000000) != 0;
// AVX instructions will generate an illegal instruction exception unless
// a) they are supported by the CPU,
// b) XSAVE is supported by the CPU and
@@ -245,7 +242,7 @@ void CPU::Initialize() {
// Because of that, we also test the XSAVE bit because its description in
// the CPUID documentation suggests that it signals xgetbv support.
has_avx_ =
- has_avx_hardware_ &&
+ (cpu_info[2] & 0x10000000) != 0 &&
(cpu_info[2] & 0x04000000) != 0 /* XSAVE */ &&
(cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
(_xgetbv(0) & 6) == 6 /* XSAVE enabled by kernel */;
diff --git a/base/cpu.h b/base/cpu.h
index b396078..8c3c06c 100644
--- a/base/cpu.h
+++ b/base/cpu.h
@@ -48,12 +48,6 @@ class BASE_EXPORT CPU {
bool has_sse42() const { return has_sse42_; }
bool has_avx() const { return has_avx_; }
bool has_avx2() const { return has_avx2_; }
- // has_avx_hardware returns true when AVX is present in the CPU. This might
- // differ from the value of |has_avx()| because |has_avx()| also tests for
- // operating system support needed to actually call AVX instuctions.
- // Note: you should never need to call this function. It was added in order
- // to workaround a bug in NSS but |has_avx()| is what you want.
- bool has_avx_hardware() const { return has_avx_hardware_; }
bool has_aesni() const { return has_aesni_; }
bool has_non_stop_time_stamp_counter() const {
return has_non_stop_time_stamp_counter_;
@@ -85,7 +79,6 @@ class BASE_EXPORT CPU {
bool has_sse41_;
bool has_sse42_;
bool has_avx_;
- bool has_avx_hardware_;
bool has_avx2_;
bool has_aesni_;
bool has_non_stop_time_stamp_counter_;
diff --git a/crypto/nss_util.cc b/crypto/nss_util.cc
index d13170c..8e378f4 100644
--- a/crypto/nss_util.cc
+++ b/crypto/nss_util.cc
@@ -682,8 +682,6 @@ class NSSInitSingleton {
// other threads from accessing until the constructor is done.
thread_checker_.DetachFromThread();
- DisableAESNIIfNeeded();
-
EnsureNSPRInit();
// We *must* have NSS >= 3.14.3.
@@ -845,22 +843,6 @@ class NSSInitSingleton {
}
#endif
- static void DisableAESNIIfNeeded() {
- if (NSS_VersionCheck("3.15") && !NSS_VersionCheck("3.15.4")) {
- // Some versions of NSS have a bug that causes AVX instructions to be
- // used without testing whether XSAVE is enabled by the operating system.
- // In order to work around this, we disable AES-NI in NSS when we find
- // that |has_avx()| is false (which includes the XSAVE test). See
- // https://bugzilla.mozilla.org/show_bug.cgi?id=940794
- base::CPU cpu;
-
- if (cpu.has_avx_hardware() && !cpu.has_avx()) {
- scoped_ptr<base::Environment> env(base::Environment::Create());
- env->SetVar("NSS_DISABLE_HW_AES", "1");
- }
- }
- }
-
bool tpm_token_enabled_for_nss_;
bool initializing_tpm_token_;
typedef std::vector<base::Closure> TPMReadyCallbackList;