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authorpetarj@mips.com <petarj@mips.com@0039d316-1c4b-4281-b951-d872f2087c98>2012-08-09 14:02:14 +0000
committerpetarj@mips.com <petarj@mips.com@0039d316-1c4b-4281-b951-d872f2087c98>2012-08-09 14:02:14 +0000
commitfc2ed2cef2c89cdc6fac142c8eaa76593abc6b00 (patch)
treee0fc334e524b7cf7cf127b5a629251dc4106b2ce /base
parent4aadc39eb6796f3ed92ec34fa6c39c2b8021d849 (diff)
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[MIPS] Add DEBUG_BREAK() for MIPS architecture.
Small change to add correct asm break instruction for MIPS architecture. BUG= https://code.google.com/p/chromium/issues/detail?id=130022 TEST=make chrome Review URL: https://chromiumcodereview.appspot.com/10834234 git-svn-id: svn://svn.chromium.org/chrome/trunk/src@150789 0039d316-1c4b-4281-b951-d872f2087c98
Diffstat (limited to 'base')
-rwxr-xr-x[-rw-r--r--]base/debug/debugger_posix.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/base/debug/debugger_posix.cc b/base/debug/debugger_posix.cc
index 4139f73..796b0e8 100644..100755
--- a/base/debug/debugger_posix.cc
+++ b/base/debug/debugger_posix.cc
@@ -222,6 +222,8 @@ bool BeingDebugged() {
// ARM && !ANDROID
#define DEBUG_BREAK() asm("bkpt 0")
#endif
+#elif defined(ARCH_CPU_MIPS_FAMILY)
+#define DEBUG_BREAK() asm("break 2")
#else
#define DEBUG_BREAK() asm("int3")
#endif