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authorthestig@chromium.org <thestig@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2012-09-13 01:32:19 +0000
committerthestig@chromium.org <thestig@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2012-09-13 01:32:19 +0000
commit9a4e11269bbb90727a1d9e1abd9e17c73ee97b97 (patch)
treea4e6321367d28ed1c4420d9ace7cfb31cb4f7d61 /third_party/qcms
parentbe40af762bf410f42d8496375aae57673c828965 (diff)
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qcms: Change qcms to not use SSE2 for 32-bit *nix Chrome builds.
BUG=137777 TEST=Chrome can render JPEGs on a Pentium II running Linux. Review URL: https://chromiumcodereview.appspot.com/10907190 git-svn-id: svn://svn.chromium.org/chrome/trunk/src@156454 0039d316-1c4b-4281-b951-d872f2087c98
Diffstat (limited to 'third_party/qcms')
-rw-r--r--third_party/qcms/README.chromium2
-rw-r--r--third_party/qcms/google.patch17
-rw-r--r--third_party/qcms/qcms.gyp22
-rw-r--r--third_party/qcms/src/transform.c4
4 files changed, 37 insertions, 8 deletions
diff --git a/third_party/qcms/README.chromium b/third_party/qcms/README.chromium
index 81e1de6..8307af8 100644
--- a/third_party/qcms/README.chromium
+++ b/third_party/qcms/README.chromium
@@ -26,3 +26,5 @@ google.patch contains the following modifications. Apply with
- Applied upstream patch for sanitizing gamma table:
- Expanded gamma clamp range to allow 1.0.
- Do not short-circuit bogus profile check for A2B0 or B2A0 unless v4 enabled.
+ - Only reference code from transform-sse1.c and transform-sse2.c when SSE is
+ enabled.
diff --git a/third_party/qcms/google.patch b/third_party/qcms/google.patch
index 3d63064..6c1cc28 100644
--- a/third_party/qcms/google.patch
+++ b/third_party/qcms/google.patch
@@ -707,6 +707,23 @@ index 9a6562b..1f4e72b 100644
/* don't precache if we do not have the TRC curves */
if (!profile->redTRC || !profile->greenTRC || !profile->blueTRC)
+@@ -1224,14 +1224,14 @@
+ return NULL;
+ }
+ if (precache) {
+-#ifdef X86
++#if defined(SSE2_ENABLE) && defined(X86)
+ if (sse_version_available() >= 2) {
+ if (in_type == QCMS_DATA_RGB_8)
+ transform->transform_fn = qcms_transform_data_rgb_out_lut_sse2;
+ else
+ transform->transform_fn = qcms_transform_data_rgba_out_lut_sse2;
+
+-#if !(defined(_MSC_VER) && defined(_M_AMD64))
++#if defined(SSE2_ENABLE) && !(defined(_MSC_VER) && defined(_M_AMD64))
+ /* Microsoft Compiler for x64 doesn't support MMX.
+ * SSE code uses MMX so that we disable on x64 */
+ } else
@@ -1262,7 +1329,17 @@ __attribute__((__force_align_arg_pointer__))
#endif
void qcms_transform_data(qcms_transform *transform, void *src, void *dest, size_t length)
diff --git a/third_party/qcms/qcms.gyp b/third_party/qcms/qcms.gyp
index 0208b1e..aeee4e6 100644
--- a/third_party/qcms/qcms.gyp
+++ b/third_party/qcms/qcms.gyp
@@ -3,6 +3,19 @@
# found in the LICENSE file.
{
+ 'variables': {
+ 'conditions': [
+ # For ARM, turn off SSE2.
+ # For x86, turn off SSE2 for non-CrOS *nix Chrome builds.
+ ['disable_sse2==1 or target_arch=="arm" or \
+ (branding=="Chrome" and target_arch=="ia32" and \
+ os_posix==1 and OS!="mac" and chromeos==0)', {
+ 'qcms_use_sse': 0,
+ }, {
+ 'qcms_use_sse': 1,
+ }],
+ ],
+ },
'targets': [
{
'target_name': 'qcms',
@@ -30,13 +43,10 @@
# removed on next roll.
'msvs_disabled_warnings': [ 4018 ],
'conditions': [
- [ 'target_arch != "arm" and OS in ["linux", "freebsd", "openbsd", "solaris"]', {
- 'cflags': [
- '-msse',
- '-msse2',
+ [ 'qcms_use_sse==1', {
+ 'defines': [
+ 'SSE2_ENABLE',
],
- }],
- [ 'target_arch != "arm"', {
'sources': [
'src/transform-sse1.c',
'src/transform-sse2.c',
diff --git a/third_party/qcms/src/transform.c b/third_party/qcms/src/transform.c
index 1f4e72b..976c498 100644
--- a/third_party/qcms/src/transform.c
+++ b/third_party/qcms/src/transform.c
@@ -1224,14 +1224,14 @@ qcms_transform* qcms_transform_create(
return NULL;
}
if (precache) {
-#ifdef X86
+#if defined(SSE2_ENABLE) && defined(X86)
if (sse_version_available() >= 2) {
if (in_type == QCMS_DATA_RGB_8)
transform->transform_fn = qcms_transform_data_rgb_out_lut_sse2;
else
transform->transform_fn = qcms_transform_data_rgba_out_lut_sse2;
-#if !(defined(_MSC_VER) && defined(_M_AMD64))
+#if defined(SSE2_ENABLE) && !(defined(_MSC_VER) && defined(_M_AMD64))
/* Microsoft Compiler for x64 doesn't support MMX.
* SSE code uses MMX so that we disable on x64 */
} else