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authorChunqiu Wang <cqwang@motorola.com>2009-06-24 17:13:39 +0000
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-12 09:39:16 -0700
commit699117a69f53efbdf8fddbd6d991575c0a22fd74 (patch)
treea29983842587a87f5270631026dbb3406a57ad52
parenta118b5f3391fc60e1619a79f8ceb070bb7b39b2d (diff)
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OMAP3: GPIO: Only enable WAKEUPEN for edge detection GPIOs
According to the GPIO 'Wakeup and Interrupt' section of the TRM[1], wake-up requests can only be generated on edge transitions. Also for OMAP3, only edge GPIOs may lose interrupts when PER enters RET/OFF state, this is addressed by gpio prepare|resume idle functions [1] Section 25.5.3.1 OMAP34xx_ES3.1_TRM_V_Q Signed-off-by: Chunqiu Wang <cqwang@motorola.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/plat-omap/gpio.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 6216f4f..2f185ff 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -724,7 +724,11 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
OMAP4_GPIO_IRQWAKEN0);
}
} else {
- if (trigger != 0)
+ /*
+ * GPIO wakeup request can only be generated on edge
+ * transitions
+ */
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
__raw_writel(1 << gpio, bank->base
+ OMAP24XX_GPIO_SETWKUENA);
else
@@ -734,7 +738,13 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
}
/* This part needs to be executed always for OMAP34xx */
if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
- if (trigger != 0)
+ /*
+ * Log the edge gpio and manually trigger the IRQ
+ * after resume if the input level changes
+ * to avoid irq lost during PER RET/OFF mode
+ * Applies for omap2 non-wakeup gpio and all omap3 gpios
+ */
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
bank->enabled_non_wakeup_gpios |= gpio_bit;
else
bank->enabled_non_wakeup_gpios &= ~gpio_bit;