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author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:06:21 +0100 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 21:45:45 +0000 |
commit | 7f565ecc33c5536a76cd73847874df5f804a49aa (patch) | |
tree | f2e70ec95d952b289ea0ea87a078b75f0a74a902 | |
parent | b2a6cf3b1e099a724504ba16a4c9aea1eb0122a6 (diff) | |
download | kernel_samsung_smdk4412-7f565ecc33c5536a76cd73847874df5f804a49aa.zip kernel_samsung_smdk4412-7f565ecc33c5536a76cd73847874df5f804a49aa.tar.gz kernel_samsung_smdk4412-7f565ecc33c5536a76cd73847874df5f804a49aa.tar.bz2 |
[ARM] S3C: Add <plat/cpu-freq.h> for initial cpufreq definitions
This is the header file that defines the basic cpu frequency
scalling support for the Samsung S3C series of SoC.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r-- | arch/arm/plat-s3c/include/plat/cpu-freq.h | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h new file mode 100644 index 0000000..c86a133 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h @@ -0,0 +1,94 @@ +/* arch/arm/plat-s3c/include/plat/cpu-freq.h + * + * Copyright (c) 2006,2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C CPU frequency scaling support - driver and board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/cpufreq.h> + +struct s3c_cpufreq_info; +struct s3c_cpufreq_board; +struct s3c_iotimings; + +struct s3c_freq { + unsigned long fclk; + unsigned long armclk; + unsigned long hclk_tns; /* in 10ths of ns */ + unsigned long hclk; + unsigned long pclk; +}; + +/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the + * notification can use this information that is not provided by just + * having the core frequency alone. + */ + +struct s3c_cpufreq_freqs { + struct cpufreq_freqs freqs; + struct s3c_freq old; + struct s3c_freq new; +}; + +#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) + +struct s3c_clkdivs { + int p_divisor; /* fclk / pclk */ + int h_divisor; /* fclk / hclk */ + int arm_divisor; /* not all cpus have this. */ + unsigned char dvs; /* using dvs mode to arm. */ +}; + +#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) + +struct s3c_pllval { + unsigned long freq; + unsigned long pll_reg; +}; + +struct s3c_cpufreq_config { + struct s3c_freq freq; + struct s3c_pllval pll; + struct s3c_clkdivs divs; + struct s3c_cpufreq_info *info; /* for core, not drivers */ + struct s3c_cpufreq_board *board; +}; + +/* s3c_cpufreq_board + * + * per-board configuraton information, such as memory refresh and + * how to initialise IO timings. + */ +struct s3c_cpufreq_board { + unsigned int refresh; /* refresh period in ns */ + unsigned int auto_io:1; /* automatically init io timings. */ + unsigned int need_io:1; /* set if needs io timing support. */ + + /* any non-zero field in here is taken as an upper limit. */ + struct s3c_freq max; /* frequency limits */ +}; + +/* Things depending on frequency scaling. */ +#ifdef CONFIG_CPU_FREQ_S3C +#define __init_or_cpufreq +#else +#define __init_or_cpufreq __init +#endif + +/* Board functions */ + +#ifdef CONFIG_CPU_FREQ_S3C +extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board); +#else + +static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) +{ + return 0; +} +#endif /* CONFIG_CPU_FREQ_S3C */ |