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| author | David Brown <davidb@codeaurora.org> | 2011-01-24 11:16:51 -0800 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2011-01-24 11:16:51 -0800 |
| commit | 75b0d32d5c0acd9b28f447aeddde5e94e5d64e5d (patch) | |
| tree | fc39655b6fcac0aea52db3c1d534b31efd42a7d4 /arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | |
| parent | c243e5284371eb90af2c6771af60fa54c57513a4 (diff) | |
| parent | 50ede4e39aa5b61685ca87f58422478b1a538ca8 (diff) | |
| download | kernel_samsung_smdk4412-75b0d32d5c0acd9b28f447aeddde5e94e5d64e5d.zip kernel_samsung_smdk4412-75b0d32d5c0acd9b28f447aeddde5e94e5d64e5d.tar.gz kernel_samsung_smdk4412-75b0d32d5c0acd9b28f447aeddde5e94e5d64e5d.tar.bz2 | |
Merge branch 'msm-8960' into for-next
* msm-8960:
msm: Support for the MSM8960 RUMI3 target
msm: Support for the MSM8960 Simulator target
msm: Makefile cleanup
msm: timer: Timer support for MSM8960
msm: Add MSM 8960 cpu_is check
msm: irqs-8960: Interrupt map for MSM8960
msm: Physical offset for MSM8960
msm: io: I/O register definitions for MSM8960
msm: Generalize QGIC registers
msm: Generalize timer register mappings
msm: Add CPU queries
Diffstat (limited to 'arch/arm/mach-msm/include/mach/msm_iomap-8x50.h')
| -rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index acc819e..cf1c2df 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. + * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved. * Author: Brian Swetland <swetland@google.com> * * This software is licensed under the terms of the GNU General Public @@ -39,16 +39,8 @@ #define MSM_VIC_PHYS 0xAC000000 #define MSM_VIC_SIZE SZ_4K -#define MSM_CSR_BASE IOMEM(0xE0001000) -#define MSM_CSR_PHYS 0xAC100000 -#define MSM_CSR_SIZE SZ_4K - -#define MSM_TMR_PHYS MSM_CSR_PHYS -#define MSM_TMR_BASE MSM_CSR_BASE -#define MSM_TMR_SIZE SZ_4K - -#define MSM_GPT_BASE MSM_TMR_BASE -#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10) +#define QSD8X50_CSR_PHYS 0xAC100000 +#define QSD8X50_CSR_SIZE SZ_4K #define MSM_DMOV_BASE IOMEM(0xE0002000) #define MSM_DMOV_PHYS 0xA9700000 |