ARM: 5859/1: Add nuc93x platform support

The previous nuc932 support patches have been discarded by me and because it belongs to
another SoCs series named nuc93x,at present, which included nuc931 and nuc932, I think it is
better to create a new mach-nuc93x,So I made the patch,and request your advice.Thanks!

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

16 files changed, 642 insertions, 0 deletions

diff --git a/arch/arm/mach-nuc93x/include/mach/clkdev.h b/arch/arm/mach-nuc93x/include/mach/clkdev.h
new file mode 100644
index 0000000..04b37a8
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-nuc93x/include/mach/entry-macro.S b/arch/arm/mach-nuc93x/include/mach/entry-macro.S
new file mode 100644
index 0000000..1352cbd
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/entry-macro.S
@@ -0,0 +1,32 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/entry-macro.S
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#include <mach/hardware.h>
+#include <mach/regs-irq.h>
+
+	.macro  get_irqnr_preamble, base, tmp
+	.endm
+
+	.macro  arch_ret_to_user, tmp1, tmp2
+	.endm
+
+	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+		mov	\base, #AIC_BA
+
+		ldr	\irqnr, [ \base, #AIC_IPER]
+		ldr	\irqnr, [ \base, #AIC_ISNR]
+		cmp	\irqnr, #0
+
+	.endm
+
+	/* currently don't need an disable_fiq macro */
+
+	.macro	disable_fiq
+	.endm
diff --git a/arch/arm/mach-nuc93x/include/mach/hardware.h b/arch/arm/mach-nuc93x/include/mach/hardware.h
new file mode 100644
index 0000000..fb5c6fc
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/hardware.h
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/hardware.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/sizes.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/io.h b/arch/arm/mach-nuc93x/include/mach/io.h
new file mode 100644
index 0000000..72e5051
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/io.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/io.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT	0xffffffff
+
+/*
+ * 1:1 mapping for ioremapped regions.
+ */
+
+#define __mem_pci(a)	(a)
+#define __io(a)		__typesafe_io(a)
+
+#endif
diff --git a/arch/arm/mach-nuc93x/include/mach/irqs.h b/arch/arm/mach-nuc93x/include/mach/irqs.h
new file mode 100644
index 0000000..7c4aa71
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/irqs.h
@@ -0,0 +1,59 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/irqs.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#define NUC93X_IRQ(x)	(x)
+
+/* Main cpu interrupts */
+
+#define IRQ_WDT		NUC93X_IRQ(1)
+#define IRQ_IRQ0	NUC93X_IRQ(2)
+#define IRQ_IRQ1	NUC93X_IRQ(3)
+#define IRQ_IRQ2	NUC93X_IRQ(4)
+#define IRQ_IRQ3	NUC93X_IRQ(5)
+#define IRQ_USBH	NUC93X_IRQ(6)
+#define IRQ_APU		NUC93X_IRQ(7)
+#define IRQ_VPOST	NUC93X_IRQ(8)
+#define IRQ_ADC		NUC93X_IRQ(9)
+#define IRQ_UART0	NUC93X_IRQ(10)
+#define IRQ_TIMER0	NUC93X_IRQ(11)
+#define IRQ_GPU0	NUC93X_IRQ(12)
+#define IRQ_GPU1	NUC93X_IRQ(13)
+#define IRQ_GPU2	NUC93X_IRQ(14)
+#define IRQ_GPU3	NUC93X_IRQ(15)
+#define IRQ_GPU4	NUC93X_IRQ(16)
+#define IRQ_VIN		NUC93X_IRQ(17)
+#define IRQ_USBD	NUC93X_IRQ(18)
+#define IRQ_VRAMLD	NUC93X_IRQ(19)
+#define IRQ_GDMA0	NUC93X_IRQ(20)
+#define IRQ_GDMA1	NUC93X_IRQ(21)
+#define IRQ_SDIO	NUC93X_IRQ(22)
+#define IRQ_FMI		NUC93X_IRQ(22)
+#define IRQ_JPEG	NUC93X_IRQ(23)
+#define IRQ_SPI0	NUC93X_IRQ(24)
+#define IRQ_SPI1	NUC93X_IRQ(25)
+#define IRQ_RTC		NUC93X_IRQ(26)
+#define IRQ_PWM0	NUC93X_IRQ(27)
+#define IRQ_PWM1	NUC93X_IRQ(28)
+#define IRQ_PWM2	NUC93X_IRQ(29)
+#define IRQ_PWM3	NUC93X_IRQ(30)
+#define IRQ_I2SAC97	NUC93X_IRQ(31)
+#define IRQ_CAP0	IRQ_PWM0
+#define IRQ_CAP1	IRQ_PWM1
+#define IRQ_CAP2	IRQ_PWM2
+#define IRQ_CAP3	IRQ_PWM3
+#define NR_IRQS		(IRQ_I2SAC97 + 1)
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/map.h b/arch/arm/mach-nuc93x/include/mach/map.h
new file mode 100644
index 0000000..fd0b5e8
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/map.h
@@ -0,0 +1,139 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/map.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H
+
+#define MAP_OFFSET	(0xfff00000)
+#define CLK_OFFSET	(0x10)
+
+#ifndef __ASSEMBLY__
+#define NUC93X_ADDR(x)	((void __iomem *)(0xF0000000 + ((x)&(~MAP_OFFSET))))
+#else
+#define NUC93X_ADDR(x)	(0xF0000000 + ((x)&(~MAP_OFFSET)))
+#endif
+
+ /*
+  * nuc932 hardware register definition
+  */
+
+#define NUC93X_PA_IRQ		(0xFFF83000)
+#define NUC93X_PA_GCR		(0xFFF00000)
+#define NUC93X_PA_EBI		(0xFFF01000)
+#define NUC93X_PA_UART		(0xFFF80000)
+#define NUC93X_PA_TIMER		(0xFFF81000)
+#define NUC93X_PA_GPIO		(0xFFF84000)
+#define NUC93X_PA_GDMA		(0xFFF03000)
+#define NUC93X_PA_USBHOST	(0xFFF0d000)
+#define NUC93X_PA_I2C		(0xFFF89000)
+#define NUC93X_PA_LCD		(0xFFF06000)
+#define NUC93X_PA_GE		(0xFFF05000)
+#define NUC93X_PA_ADC		(0xFFF85000)
+#define NUC93X_PA_RTC		(0xFFF87000)
+#define NUC93X_PA_PWM		(0xFFF82000)
+#define NUC93X_PA_ACTL		(0xFFF0a000)
+#define NUC93X_PA_USBDEV	(0xFFF0C000)
+#define NUC93X_PA_JEPEG		(0xFFF0e000)
+#define NUC93X_PA_CACHE_T	(0xFFF60000)
+#define NUC93X_PA_VRAM		(0xFFF0b000)
+#define NUC93X_PA_DMAC		(0xFFF09000)
+#define NUC93X_PA_I2SM		(0xFFF08000)
+#define NUC93X_PA_CACHE		(0xFFF02000)
+#define NUC93X_PA_GPU		(0xFFF04000)
+#define NUC93X_PA_VIDEOIN	(0xFFF07000)
+#define NUC93X_PA_SPI0		(0xFFF86000)
+#define NUC93X_PA_SPI1		(0xFFF88000)
+
+ /*
+  * nuc932 virtual address mapping.
+  * interrupt controller is the first thing we put in, to make
+  * the assembly code for the irq detection easier
+  */
+
+#define NUC93X_VA_IRQ		NUC93X_ADDR(0x00000000)
+#define NUC93X_SZ_IRQ		SZ_4K
+
+#define NUC93X_VA_GCR		NUC93X_ADDR(NUC93X_PA_IRQ)
+#define NUC93X_VA_CLKPWR	(NUC93X_VA_GCR+CLK_OFFSET)
+#define NUC93X_SZ_GCR		SZ_4K
+
+/* EBI management */
+
+#define NUC93X_VA_EBI		NUC93X_ADDR(NUC93X_PA_EBI)
+#define NUC93X_SZ_EBI		SZ_4K
+
+/* UARTs */
+
+#define NUC93X_VA_UART		NUC93X_ADDR(NUC93X_PA_UART)
+#define NUC93X_SZ_UART		SZ_4K
+
+/* Timers */
+
+#define NUC93X_VA_TIMER	NUC93X_ADDR(NUC93X_PA_TIMER)
+#define NUC93X_SZ_TIMER	SZ_4K
+
+/* GPIO ports */
+
+#define NUC93X_VA_GPIO		NUC93X_ADDR(NUC93X_PA_GPIO)
+#define NUC93X_SZ_GPIO		SZ_4K
+
+/* GDMA control */
+
+#define NUC93X_VA_GDMA		NUC93X_ADDR(NUC93X_PA_GDMA)
+#define NUC93X_SZ_GDMA		SZ_4K
+
+/* I2C hardware controller */
+
+#define NUC93X_VA_I2C		NUC93X_ADDR(NUC93X_PA_I2C)
+#define NUC93X_SZ_I2C		SZ_4K
+
+/* LCD controller*/
+
+#define NUC93X_VA_LCD		NUC93X_ADDR(NUC93X_PA_LCD)
+#define NUC93X_SZ_LCD		SZ_4K
+
+/* 2D controller*/
+
+#define NUC93X_VA_GE		NUC93X_ADDR(NUC93X_PA_GE)
+#define NUC93X_SZ_GE		SZ_4K
+
+/* ADC */
+
+#define NUC93X_VA_ADC		NUC93X_ADDR(NUC93X_PA_ADC)
+#define NUC93X_SZ_ADC		SZ_4K
+
+/* RTC */
+
+#define NUC93X_VA_RTC		NUC93X_ADDR(NUC93X_PA_RTC)
+#define NUC93X_SZ_RTC		SZ_4K
+
+/* Pulse Width Modulation(PWM) Registers */
+
+#define NUC93X_VA_PWM		NUC93X_ADDR(NUC93X_PA_PWM)
+#define NUC93X_SZ_PWM		SZ_4K
+
+/* Audio Controller controller */
+
+#define NUC93X_VA_ACTL		NUC93X_ADDR(NUC93X_PA_ACTL)
+#define NUC93X_SZ_ACTL		SZ_4K
+
+/* USB Device port */
+
+#define NUC93X_VA_USBDEV	NUC93X_ADDR(NUC93X_PA_USBDEV)
+#define NUC93X_SZ_USBDEV	SZ_4K
+
+/* USB host controller*/
+#define NUC93X_VA_USBHOST	NUC93X_ADDR(NUC93X_PA_USBHOST)
+#define NUC93X_SZ_USBHOST	SZ_4K
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/memory.h b/arch/arm/mach-nuc93x/include/mach/memory.h
new file mode 100644
index 0000000..323ab0d
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/memory.h
@@ -0,0 +1,21 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/memory.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET	UL(0x00000000)
+
+#endif
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-clock.h b/arch/arm/mach-nuc93x/include/mach/regs-clock.h
new file mode 100644
index 0000000..5cb2954
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/regs-clock.h
@@ -0,0 +1,53 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H
+
+/* Clock Control Registers  */
+#define CLK_BA		NUC93X_VA_CLKPWR
+#define REG_CLKEN	(CLK_BA + 0x00)
+#define REG_CLKSEL	(CLK_BA + 0x04)
+#define REG_CLKDIV	(CLK_BA + 0x08)
+#define REG_PLLCON0	(CLK_BA + 0x0C)
+#define REG_PLLCON1	(CLK_BA + 0x10)
+#define REG_PMCON	(CLK_BA + 0x14)
+#define REG_IRQWAKECON	(CLK_BA + 0x18)
+#define REG_IRQWAKEFLAG	(CLK_BA + 0x1C)
+#define REG_IPSRST	(CLK_BA + 0x20)
+#define REG_CLKEN1	(CLK_BA + 0x24)
+#define REG_CLKDIV1	(CLK_BA + 0x28)
+
+/* Define PLL freq setting */
+#define PLL_DISABLE		0x12B63
+#define	PLL_66MHZ		0x2B63
+#define	PLL_100MHZ		0x4F64
+#define PLL_120MHZ		0x4F63
+#define	PLL_166MHZ		0x4124
+#define	PLL_200MHZ		0x4F24
+
+/* Define AHB:CPUFREQ ratio */
+#define	AHB_CPUCLK_1_1		0x00
+#define	AHB_CPUCLK_1_2		0x01
+#define	AHB_CPUCLK_1_4		0x02
+#define	AHB_CPUCLK_1_8		0x03
+
+/* Define APB:AHB ratio */
+#define APB_AHB_1_2		0x01
+#define APB_AHB_1_4		0x02
+#define APB_AHB_1_8		0x03
+
+/* Define clock skew */
+#define DEFAULTSKEW		0x48
+
+#endif /*  __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-ebi.h b/arch/arm/mach-nuc93x/include/mach/regs-ebi.h
new file mode 100644
index 0000000..3c72550
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/regs-ebi.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/regs-ebi.h
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#ifndef __ASM_ARCH_REGS_EBI_H
+#define __ASM_ARCH_REGS_EBI_H
+
+/* EBI Control Registers */
+
+#define EBI_BA		NUC93X_VA_EBI
+#define REG_EBICON	(EBI_BA + 0x00)
+#define REG_ROMCON	(EBI_BA + 0x04)
+#define REG_SDCONF0	(EBI_BA + 0x08)
+#define REG_SDCONF1	(EBI_BA + 0x0C)
+#define REG_SDTIME0	(EBI_BA + 0x10)
+#define REG_SDTIME1	(EBI_BA + 0x14)
+#define REG_EXT0CON	(EBI_BA + 0x18)
+#define REG_EXT1CON	(EBI_BA + 0x1C)
+#define REG_EXT2CON	(EBI_BA + 0x20)
+#define REG_EXT3CON	(EBI_BA + 0x24)
+#define REG_EXT4CON	(EBI_BA + 0x28)
+#define REG_CKSKEW	(EBI_BA + 0x2C)
+
+#endif /*  __ASM_ARCH_REGS_EBI_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-irq.h b/arch/arm/mach-nuc93x/include/mach/regs-irq.h
new file mode 100644
index 0000000..2302159
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/regs-irq.h
@@ -0,0 +1,42 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef ___ASM_ARCH_REGS_IRQ_H
+#define ___ASM_ARCH_REGS_IRQ_H
+
+/* Advance Interrupt Controller (AIC) Registers */
+
+#define AIC_BA    		NUC93X_VA_IRQ
+
+#define REG_AIC_IRQSC		(AIC_BA+0x80)
+#define REG_AIC_GEN		(AIC_BA+0x84)
+#define REG_AIC_GASR		(AIC_BA+0x88)
+#define REG_AIC_GSCR		(AIC_BA+0x8C)
+#define REG_AIC_IRSR		(AIC_BA+0x100)
+#define REG_AIC_IASR		(AIC_BA+0x104)
+#define REG_AIC_ISR		(AIC_BA+0x108)
+#define REG_AIC_IPER		(AIC_BA+0x10C)
+#define REG_AIC_ISNR		(AIC_BA+0x110)
+#define REG_AIC_IMR		(AIC_BA+0x114)
+#define REG_AIC_OISR		(AIC_BA+0x118)
+#define REG_AIC_MECR		(AIC_BA+0x120)
+#define REG_AIC_MDCR		(AIC_BA+0x124)
+#define REG_AIC_SSCR		(AIC_BA+0x128)
+#define REG_AIC_SCCR		(AIC_BA+0x12C)
+#define REG_AIC_EOSCR		(AIC_BA+0x130)
+#define AIC_IPER		(0x10C)
+#define AIC_ISNR		(0x110)
+
+#endif /* ___ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-serial.h b/arch/arm/mach-nuc93x/include/mach/regs-serial.h
new file mode 100644
index 0000000..767a047
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/regs-serial.h
@@ -0,0 +1,52 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_REGS_SERIAL_H
+#define __ASM_ARM_REGS_SERIAL_H
+
+#define UART0_BA	NUC93X_VA_UART
+#define UART1_BA	(NUC93X_VA_UART+0x100)
+
+#define UART0_PA	NUC93X_PA_UART
+#define UART1_PA	(NUC93X_PA_UART+0x100)
+
+
+#ifndef __ASSEMBLY__
+
+struct nuc93x_uart_clksrc {
+	const char	*name;
+	unsigned int	divisor;
+	unsigned int	min_baud;
+	unsigned int	max_baud;
+};
+
+struct nuc93x_uartcfg {
+	unsigned char	hwport;
+	unsigned char	unused;
+	unsigned short	flags;
+	unsigned long	uart_flags;
+
+	unsigned long	ucon;
+	unsigned long	ulcon;
+	unsigned long	ufcon;
+
+	struct nuc93x_uart_clksrc *clocks;
+	unsigned int	clocks_size;
+};
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_REGS_SERIAL_H */
+
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-timer.h b/arch/arm/mach-nuc93x/include/mach/regs-timer.h
new file mode 100644
index 0000000..394be96
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/regs-timer.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/regs-timer.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_REGS_TIMER_H
+#define __ASM_ARCH_REGS_TIMER_H
+
+/* Timer Registers */
+
+#define TMR_BA			NUC93X_VA_TIMER
+#define REG_TCSR0		(TMR_BA+0x00)
+#define REG_TICR0		(TMR_BA+0x08)
+#define REG_TDR0		(TMR_BA+0x10)
+#define REG_TISR		(TMR_BA+0x18)
+#define REG_WTCR		(TMR_BA+0x1C)
+
+#endif /*  __ASM_ARCH_REGS_TIMER_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/system.h b/arch/arm/mach-nuc93x/include/mach/system.h
new file mode 100644
index 0000000..d26bd9a
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/system.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm/machnuc93x/include/mach/system.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/system.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <asm/proc-fns.h>
+
+static void arch_idle(void)
+{
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+	cpu_reset(0);
+}
+
diff --git a/arch/arm/mach-nuc93x/include/mach/timex.h b/arch/arm/mach-nuc93x/include/mach/timex.h
new file mode 100644
index 0000000..0c719cc
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/timex.h
@@ -0,0 +1,25 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/timex.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/timex.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE Now, I don't use it. */
+
+#define CLOCK_TICK_RATE 27000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/uncompress.h b/arch/arm/mach-nuc93x/include/mach/uncompress.h
new file mode 100644
index 0000000..73082cd
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/uncompress.h
@@ -0,0 +1,50 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/uncompress.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/uncompress.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+/* Defines for UART registers */
+
+#include <mach/regs-serial.h>
+#include <mach/map.h>
+#include <linux/serial_reg.h>
+
+#define arch_decomp_wdog()
+
+#define TX_DONE	(UART_LSR_TEMT | UART_LSR_THRE)
+static u32 * uart_base = (u32 *)UART0_PA;
+
+static void putc(int ch)
+{
+	/* Check THRE and TEMT bits before we transmit the character.
+	 */
+	while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
+		barrier();
+
+	*uart_base = ch;
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#endif/* __ASM_NUC93X_UNCOMPRESS_H */
diff --git a/arch/arm/mach-nuc93x/include/mach/vmalloc.h b/arch/arm/mach-nuc93x/include/mach/vmalloc.h
new file mode 100644
index 0000000..98a21b8
--- /dev/null
+++ b/arch/arm/mach-nuc93x/include/mach/vmalloc.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-nuc93x/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END	  (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */