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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-09 08:57:10 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-23 18:04:45 +0100 |
| commit | 29d668d260a5a022eaad1cc91fea08d02deb45b1 (patch) | |
| tree | b5eabf162e00017827d4d167e800b45e12aeff57 /arch/arm/mach-omap1 | |
| parent | df4c144f7514071a54a46eaa5a9e16299c056e29 (diff) | |
| download | kernel_samsung_smdk4412-29d668d260a5a022eaad1cc91fea08d02deb45b1.zip kernel_samsung_smdk4412-29d668d260a5a022eaad1cc91fea08d02deb45b1.tar.gz kernel_samsung_smdk4412-29d668d260a5a022eaad1cc91fea08d02deb45b1.tar.bz2 | |
ARM: omap1: delete useless interrupt handler
The OMAP1 clocksource interrupt handler just increments a variable
which otherwise isn't used, so this seems to be unnecessary. Tony
Lindgren confirms, so lets remove it.
Acked-by: Kevin Hilman <khilman@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1')
| -rw-r--r-- | arch/arm/mach-omap1/time.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 6885d2f..e2c29b4 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -189,20 +189,6 @@ static __init void omap_init_mpu_timer(unsigned long rate) * --------------------------------------------------------------------------- */ -static unsigned long omap_mpu_timer2_overflows; - -static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id) -{ - omap_mpu_timer2_overflows++; - return IRQ_HANDLED; -} - -static struct irqaction omap_mpu_timer2_irq = { - .name = "mpu_timer2", - .flags = IRQF_DISABLED, - .handler = omap_mpu_timer2_interrupt, -}; - static cycle_t mpu_read(struct clocksource *cs) { return ~omap_mpu_timer_read(1); @@ -247,7 +233,6 @@ static void __init omap_init_clocksource(unsigned long rate) static char err[] __initdata = KERN_ERR "%s: can't register clocksource!\n"; - setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); omap_mpu_timer_start(1, ~0, 1); init_sched_clock(&cd, mpu_update_sched_clock, 32, rate); |