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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 10:49:02 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 10:49:02 -0700 |
commit | 0bbf211975addc2963b63a41a2eac99928365996 (patch) | |
tree | 31e830db386e76a53db1b2248dc503be43126924 /arch/arm/mach-tegra/board-trimslice.c | |
parent | 51e8703bdf12e2481b205096c973a3ab6a8ca18b (diff) | |
parent | d5fdafd38ca0c28c4648909ce0afd0a5420309ca (diff) | |
download | kernel_samsung_smdk4412-0bbf211975addc2963b63a41a2eac99928365996.zip kernel_samsung_smdk4412-0bbf211975addc2963b63a41a2eac99928365996.tar.gz kernel_samsung_smdk4412-0bbf211975addc2963b63a41a2eac99928365996.tar.bz2 |
Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegra
* 'for-linus' of git://android.git.kernel.org/kernel/tegra: (61 commits)
ARM: tegra: trimslice: initialize PCI-e only when running on TrimSlice
ARM: tegra: add PCI Express power gating
ARM: tegra: PCIE minor code refactoring
ARM: Tegra: DMA: Fail safe if initialization fails
ARM: Tegra: Rename clk_dev1/2 to cdev1/2
ARM: Tegra: Rename I2S clocks to match driver name
ARM: Tegra: Make tegra_dma_init a postcore_initcall
ARM: tegra: add seaboard, wario and kaen boards
ARM: tegra: harmony: fix pinmux for MMC slot
ARM: tegra: harmony: register sdhci devices
ARM: tegra: remove stale nvidia atag handler
ARM: tegra: common device resources
ARM: tegra: harmony: move over to tegra_gpio_config
ARM: tegra: add tegra_gpio_table and tegra_gpio_config
ARM: tegra: Hide EMC scaling config behind ARCH_TEGRA
ARM: tegra: Fix typo in TEGRA_IRQ_TO_GPIO
ARM: tegra: common: Enable core clocks
ARM: tegra: timer: Enable timer and rtc clocks
ARM: tegra: Move tegra_common_init to tegra_init_early
ARM: tegra: clock: prevent accidental disables of cpu clock
...
Diffstat (limited to 'arch/arm/mach-tegra/board-trimslice.c')
-rw-r--r-- | arch/arm/mach-tegra/board-trimslice.c | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c new file mode 100644 index 0000000..7be7d4a --- /dev/null +++ b/arch/arm/mach-tegra/board-trimslice.c @@ -0,0 +1,106 @@ +/* + * arch/arm/mach-tegra/board-trimslice.c + * + * Copyright (C) 2011 CompuLab, Ltd. + * Author: Mike Rapoport <mike@compulab.co.il> + * + * Based on board-harmony.c + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <linux/io.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/setup.h> + +#include <mach/iomap.h> + +#include "board.h" +#include "clock.h" + +#include "board-trimslice.h" + +static struct plat_serial8250_port debug_uart_platform_data[] = { + { + .membase = IO_ADDRESS(TEGRA_UARTA_BASE), + .mapbase = TEGRA_UARTA_BASE, + .irq = INT_UARTA, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 216000000, + }, { + .flags = 0 + } +}; + +static struct platform_device debug_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = debug_uart_platform_data, + }, +}; + +static struct platform_device *trimslice_devices[] __initdata = { + &debug_uart, +}; + +static void __init tegra_trimslice_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, struct meminfo *mi) +{ + mi->nr_banks = 2; + mi->bank[0].start = PHYS_OFFSET; + mi->bank[0].size = 448 * SZ_1M; + mi->bank[1].start = SZ_512M; + mi->bank[1].size = SZ_512M; +} + +static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = { + /* name parent rate enabled */ + { "uarta", "pll_p", 216000000, true }, + { NULL, NULL, 0, 0}, +}; + +static int __init tegra_trimslice_pci_init(void) +{ + if (!machine_is_trimslice()) + return 0; + + return tegra_pcie_init(true, true); +} +subsys_initcall(tegra_trimslice_pci_init); + +static void __init tegra_trimslice_init(void) +{ + tegra_clk_init_from_table(trimslice_clk_init_table); + + trimslice_pinmux_init(); + + platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); +} + +MACHINE_START(TRIMSLICE, "trimslice") + .boot_params = 0x00000100, + .fixup = tegra_trimslice_fixup, + .map_io = tegra_map_common_io, + .init_early = tegra_init_early, + .init_irq = tegra_init_irq, + .timer = &tegra_timer, + .init_machine = tegra_trimslice_init, +MACHINE_END |