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authorLinus Walleij <linus.walleij@linaro.org>2010-10-14 13:57:59 +0200
committerLinus Walleij <linus.walleij@linaro.org>2011-03-14 14:05:14 +0100
commit5d7b8467e18b14ed44c5781d77993bfdcd8c826b (patch)
tree0bc8e0cd883c9c6a0a8184c8e69b22a6a5b8bddf /arch/arm/mach-ux500/devices-db8500.h
parentec8f12533b4a439a8feb0d1a3bf15516781804be (diff)
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mach-ux500: config Ux500 PL011 PL022 PL180 for DMA
This will configure the platform data for the PL011, PL022 and PL180 (derivate) PrimeCells found in the Ux500 to use DMA with the generic DMA engine for DMA40. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/devices-db8500.h')
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index d1ea4bd..9cc6f8f 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -91,11 +91,11 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq,
#define db8500_add_spi3(pdata) \
dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata)
-#define db8500_add_uart0() \
- dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0)
-#define db8500_add_uart1() \
- dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1)
-#define db8500_add_uart2() \
- dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2)
+#define db8500_add_uart0(pdata) \
+ dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata)
+#define db8500_add_uart1(pdata) \
+ dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1, pdata)
+#define db8500_add_uart2(pdata) \
+ dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2, pdata)
#endif