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| author | Peter Maydell <peter.maydell@linaro.org> | 2013-08-22 17:47:50 +0100 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2013-10-26 21:06:02 +0100 |
| commit | e4f24883632f4d46d4b43ae37a76932343a69839 (patch) | |
| tree | d3987a9575b956e4286d1fa308f61506c2e37c77 /arch/arm/mach-versatile | |
| parent | 45e61ad38c9493eec7ece2bfe09bde2433cdaa87 (diff) | |
| download | kernel_samsung_smdk4412-e4f24883632f4d46d4b43ae37a76932343a69839.zip kernel_samsung_smdk4412-e4f24883632f4d46d4b43ae37a76932343a69839.tar.gz kernel_samsung_smdk4412-e4f24883632f4d46d4b43ae37a76932343a69839.tar.bz2 | |
ARM: PCI: versatile: Fix SMAP register offsets
commit 99f2b130370b904ca5300079243fdbcafa2c708b upstream.
The SMAP register offsets in the versatile PCI controller code were
all off by four. (This didn't have any observable bad effects
because on this board PHYS_OFFSET is zero, and (a) writing zero to
the flags register at offset 0x10 has no effect and (b) the reset
value of the SMAP register is zero anyway, so failing to write SMAP2
didn't matter.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch/arm/mach-versatile')
| -rw-r--r-- | arch/arm/mach-versatile/pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index c898deb..189ed00 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -43,9 +43,9 @@ #define PCI_IMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x0) #define PCI_IMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x4) #define PCI_IMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x8) -#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x10) -#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14) -#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18) +#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14) +#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18) +#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x1c) #define PCI_SELFID __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0xc) #define DEVICE_ID_OFFSET 0x00 |