diff options
| author | Stephen Warren <swarren@nvidia.com> | 2011-01-05 14:32:20 -0700 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2011-02-20 20:04:15 -0800 |
| commit | 1ca00347c579f15b0eea1a6d4bab84e2cf56e745 (patch) | |
| tree | 4a80bfc4c1a849398f33a74ef45f038f38549e2b /arch/arm | |
| parent | 499ef7a5c48ea9fe8034b61de304ce9f6b753fe7 (diff) | |
| download | kernel_samsung_smdk4412-1ca00347c579f15b0eea1a6d4bab84e2cf56e745.zip kernel_samsung_smdk4412-1ca00347c579f15b0eea1a6d4bab84e2cf56e745.tar.gz kernel_samsung_smdk4412-1ca00347c579f15b0eea1a6d4bab84e2cf56e745.tar.bz2 | |
ARM: tegra: APB DMA: Enable clock and remove reset.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/dma.c | 14 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 6 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index 4625e3a..2d720f2 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -27,6 +27,7 @@ #include <linux/err.h> #include <linux/irq.h> #include <linux/delay.h> +#include <linux/clk.h> #include <mach/dma.h> #include <mach/irqs.h> #include <mach/iomap.h> @@ -675,6 +676,19 @@ int __init tegra_dma_init(void) int i; unsigned int irq; void __iomem *addr; + struct clk *c; + + c = clk_get_sys("tegra-dma", NULL); + if (IS_ERR(c)) { + pr_err("Unable to get clock for APB DMA\n"); + ret = PTR_ERR(c); + goto fail; + } + ret = clk_enable(c); + if (ret != 0) { + pr_err("Unable to enable clock for APB DMA\n"); + goto fail; + } addr = IO_ADDRESS(TEGRA_APB_DMA_BASE); writel(GEN_ENABLE, addr + APB_DMA_GEN); diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 7a2926a..49b3eda 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -1759,6 +1759,11 @@ static struct clk_mux_sel mux_clk_32k[] = { { 0, 0}, }; +static struct clk_mux_sel mux_pclk[] = { + { .input = &tegra_clk_pclk, .value = 0}, + { 0, 0}, +}; + #define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _max, _inputs, _flags) \ { \ .name = _name, \ @@ -1775,6 +1780,7 @@ static struct clk_mux_sel mux_clk_32k[] = { } struct clk tegra_periph_clks[] = { + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), |