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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-19 17:44:13 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-19 17:44:13 -0700 |
| commit | 0f1bdc1815c4cb29b3cd71a7091b478e426faa0b (patch) | |
| tree | b4d70c6a305d91bf7d1c8a6bbf87508587d55633 /arch/mips/alchemy/common | |
| parent | 80fe02b5daf176f99d3afc8f6c9dc9dece019836 (diff) | |
| parent | a18f22a968de17b29f2310cdb7ba69163e65ec15 (diff) | |
| download | kernel_samsung_smdk4412-0f1bdc1815c4cb29b3cd71a7091b478e426faa0b.zip kernel_samsung_smdk4412-0f1bdc1815c4cb29b3cd71a7091b478e426faa0b.tar.gz kernel_samsung_smdk4412-0f1bdc1815c4cb29b3cd71a7091b478e426faa0b.tar.bz2 | |
Merge branch 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
clocksource: convert mips to generic i8253 clocksource
clocksource: convert x86 to generic i8253 clocksource
clocksource: convert footbridge to generic i8253 clocksource
clocksource: add common i8253 PIT clocksource
blackfin: convert to clocksource_register_hz
mips: convert to clocksource_register_hz/khz
sparc: convert to clocksource_register_hz/khz
alpha: convert to clocksource_register_hz
microblaze: convert to clocksource_register_hz/khz
ia64: convert to clocksource_register_hz/khz
x86: Convert remaining x86 clocksources to clocksource_register_hz/khz
Make clocksource name const
Diffstat (limited to 'arch/mips/alchemy/common')
| -rw-r--r-- | arch/mips/alchemy/common/time.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 2aecb2f..d5da6ad 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -141,8 +141,7 @@ static int __init alchemy_time_init(unsigned int m2int) goto cntr_err; /* register counter1 clocksource and event device */ - clocksource_set_clock(&au1x_counter1_clocksource, 32768); - clocksource_register(&au1x_counter1_clocksource); + clocksource_register_hz(&au1x_counter1_clocksource, 32768); cd->shift = 32; cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); |