diff options
| author | Manuel Lauss <manuel.lauss@googlemail.com> | 2011-08-12 11:39:44 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-10-24 23:34:24 +0100 |
| commit | 7517de348663b08a808aff44b5300e817157a568 (patch) | |
| tree | b70b0bdbb30f2ef796c4ca319ad922e7686ca51c /arch/mips/alchemy/gpr/platform.c | |
| parent | 7cc2e272da3d88c0de9e05b32729402785bd9206 (diff) | |
| download | kernel_samsung_smdk4412-7517de348663b08a808aff44b5300e817157a568.zip kernel_samsung_smdk4412-7517de348663b08a808aff44b5300e817157a568.tar.gz kernel_samsung_smdk4412-7517de348663b08a808aff44b5300e817157a568.tar.bz2 | |
MIPS: Alchemy: Redo PCI as platform driver
- Rewrite Alchemy PCI support as a platform driver.
- Fixup boards which have PCI.
Run-tested on DB1500 and DB1550.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
delete mode 100644 arch/mips/alchemy/common/pci.c
delete mode 100644 arch/mips/pci/fixup-au1000.c
delete mode 100644 arch/mips/pci/ops-au1000.c
create mode 100644 arch/mips/pci/pci-alchemy.c
Diffstat (limited to 'arch/mips/alchemy/gpr/platform.c')
| -rw-r--r-- | arch/mips/alchemy/gpr/platform.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/mips/alchemy/gpr/platform.c b/arch/mips/alchemy/gpr/platform.c index 14b4662..982ce85 100644 --- a/arch/mips/alchemy/gpr/platform.c +++ b/arch/mips/alchemy/gpr/platform.c @@ -167,6 +167,45 @@ static struct i2c_board_info gpr_i2c_info[] __initdata = { } }; + + +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot == 0) && (pin == 1)) + return AU1550_PCI_INTA; + else if ((slot == 0) && (pin == 2)) + return AU1550_PCI_INTB; + + return -1; +} + +static struct alchemy_pci_platdata gpr_pci_pd = { + .board_map_irq = gpr_map_pci_irq, + .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | + PCI_CONFIG_CH | +#if defined(__MIPSEB__) + PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, +#else + 0, +#endif +}; + +static struct platform_device gpr_pci_host_dev = { + .dev.platform_data = &gpr_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + static struct platform_device *gpr_devices[] __initdata = { &gpr_wdt_device, &gpr_mtd_device, @@ -174,6 +213,14 @@ static struct platform_device *gpr_devices[] __initdata = { &gpr_led_devices, }; +static int __init gpr_pci_init(void) +{ + return platform_device_register(&gpr_pci_host_dev); +} +/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ +arch_initcall(gpr_pci_init); + + static int __init gpr_dev_init(void) { i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); |