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author | David S. Miller <davem@davemloft.net> | 2008-06-13 20:52:39 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2008-06-13 20:52:39 -0700 |
commit | 4ae127d1b6c71f9240dd4245f240e6dd8fc98014 (patch) | |
tree | b7aa27b3e0c655f4613fe2146cb57d7f69e421f6 /arch/mips/pci | |
parent | 875ec4333b99144e2589e900a0bcd2c25c757b27 (diff) | |
parent | 7775c9753b94fe429dc4323360d6502c95e0dd6e (diff) | |
download | kernel_samsung_smdk4412-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.zip kernel_samsung_smdk4412-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.tar.gz kernel_samsung_smdk4412-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.tar.bz2 |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/smc911x.c
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/ops-bridge.c | 20 | ||||
-rw-r--r-- | arch/mips/pci/pci-ip27.c | 8 |
2 files changed, 26 insertions, 2 deletions
diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c index 1fa0992..b46b3e2 100644 --- a/arch/mips/pci/ops-bridge.c +++ b/arch/mips/pci/ops-bridge.c @@ -14,6 +14,22 @@ #include <asm/sn/sn0/hub.h> /* + * Most of the IOC3 PCI config register aren't present + * we emulate what is needed for a normal PCI enumeration + */ +static u32 emulate_ioc3_cfg(int where, int size) +{ + if (size == 1 && where == 0x3d) + return 0x01; + else if (size == 2 && where == 0x3c) + return 0x0100; + else if (size == 4 && where == 0x3c) + return 0x00000100; + + return 0; +} + +/* * The Bridge ASIC supports both type 0 and type 1 access. Type 1 is * not really documented, so right now I can't write code which uses it. * Therefore we use type 0 accesses for now even though they won't work @@ -64,7 +80,7 @@ oh_my_gawd: * generic PCI code a chance to look at the wrong register. */ if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { - *value = 0; + *value = emulate_ioc3_cfg(where, size); return PCIBIOS_SUCCESSFUL; } @@ -127,7 +143,7 @@ oh_my_gawd: * generic PCI code a chance to look at the wrong register. */ if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { - *value = 0; + *value = emulate_ioc3_cfg(where, size); return PCIBIOS_SUCCESSFUL; } diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index bb64828..a185169 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -47,6 +47,9 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid) static int num_bridges = 0; bridge_t *bridge; int slot; + extern int pci_probe_only; + + pci_probe_only = 1; printk("a bridge\n"); @@ -100,6 +103,11 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid) */ bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | BRIDGE_CTRL_MEM_SWAP; +#ifdef CONFIG_PAGE_SIZE_4KB + bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE; +#else /* 16kB or larger */ + bridge->b_wid_control |= BRIDGE_CTRL_PAGE_SIZE; +#endif /* * Hmm... IRIX sets additional bits in the address which |