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author | Kumar Gala <galak@freescale.com> | 2005-06-25 14:54:37 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-25 16:24:26 -0700 |
commit | 33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3 (patch) | |
tree | e2ecb071823cc9ffe2755ed117bfabe04a35e1fc /arch/ppc/kernel/entry.S | |
parent | 62aa751d16399637325852bc0a1fcf13c2476dd7 (diff) | |
download | kernel_samsung_smdk4412-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.zip kernel_samsung_smdk4412-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.tar.gz kernel_samsung_smdk4412-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.tar.bz2 |
[PATCH] ppc32: Add support for Freescale e200 (Book-E) core
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache
and is not cache coherent on the bus. The e200 core also adds a separate
exception level for debug exceptions. Part of this patch helps to cleanup a
few cases that are true for all Freescale Book-E parts, not just e500.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/kernel/entry.S')
-rw-r--r-- | arch/ppc/kernel/entry.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S index 8377b6c..d4df686 100644 --- a/arch/ppc/kernel/entry.S +++ b/arch/ppc/kernel/entry.S @@ -60,6 +60,11 @@ mcheck_transfer_to_handler: TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) b transfer_to_handler_full + .globl debug_transfer_to_handler +debug_transfer_to_handler: + TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) + b transfer_to_handler_full + .globl crit_transfer_to_handler crit_transfer_to_handler: TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) @@ -835,6 +840,10 @@ ret_from_crit_exc: RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) #ifdef CONFIG_BOOKE + .globl ret_from_debug_exc +ret_from_debug_exc: + RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) + .globl ret_from_mcheck_exc ret_from_mcheck_exc: RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) |