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author | Ingo Molnar <mingo@elte.hu> | 2009-08-15 18:55:58 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-08-15 18:56:13 +0200 |
commit | fa08661af834875c9bd6f7f0b1b9388dc72a6585 (patch) | |
tree | c381fcfcfeb38515bfa93445c80ad9231343414d /arch/x86/kernel/acpi/cstate.c | |
parent | 240ebbf81f149b11a31e060ebe5ee51a3c775360 (diff) | |
parent | 64f1607ffbbc772685733ea63e6f7f4183df1b16 (diff) | |
download | kernel_samsung_smdk4412-fa08661af834875c9bd6f7f0b1b9388dc72a6585.zip kernel_samsung_smdk4412-fa08661af834875c9bd6f7f0b1b9388dc72a6585.tar.gz kernel_samsung_smdk4412-fa08661af834875c9bd6f7f0b1b9388dc72a6585.tar.bz2 |
Merge commit 'v2.6.31-rc6' into core/rcu
Merge reason: the branch was on pre-rc1 .30, update to latest.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/acpi/cstate.c')
-rw-r--r-- | arch/x86/kernel/acpi/cstate.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c index bbbe4bb..8c44c23 100644 --- a/arch/x86/kernel/acpi/cstate.c +++ b/arch/x86/kernel/acpi/cstate.c @@ -34,12 +34,22 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, flags->bm_check = 1; else if (c->x86_vendor == X86_VENDOR_INTEL) { /* - * Today all CPUs that support C3 share cache. - * TBD: This needs to look at cache shared map, once - * multi-core detection patch makes to the base. + * Today all MP CPUs that support C3 share cache. + * And caches should not be flushed by software while + * entering C3 type state. */ flags->bm_check = 1; } + + /* + * On all recent Intel platforms, ARB_DISABLE is a nop. + * So, set bm_control to zero to indicate that ARB_DISABLE + * is not required while entering C3 type state on + * P4, Core and beyond CPUs + */ + if (c->x86_vendor == X86_VENDOR_INTEL && + (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 14))) + flags->bm_control = 0; } EXPORT_SYMBOL(acpi_processor_power_init_bm_check); |