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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-02-03 15:48:03 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-03 15:48:03 +0000
commit4aba098c8d64329f0c4b24d12e1dc5398dd41a75 (patch)
treece2cebacd66325fc0795d7492ce3c49ee07f980a /arch
parent0b7d5170dc5a4aca144b27d40b67d73b245df066 (diff)
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ARM: Fix wrong register in proc-arm6_7.S data abort handler
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mm/proc-arm6_7.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 3f9cd3d..795dc61 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area)
ENTRY(cpu_arm7_data_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
- ldr r8, [r0] @ read arm instruction
+ ldr r8, [r2] @ read arm instruction
tst r8, #1 << 20 @ L = 0 -> write?
orreq r1, r1, #1 << 11 @ yes.
and r7, r8, #15 << 24