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| author | Dave Airlie <airlied@gmail.com> | 2011-01-26 17:12:42 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@gmail.com> | 2011-01-26 17:12:42 +1000 |
| commit | 52bb4a7391321b9f32c0b6e032d0a5e1796f1968 (patch) | |
| tree | e8d51066bc584605b41054c1c55a457efbed6e06 /drivers/gpu/drm/nouveau/nouveau_bios.c | |
| parent | 6663050edd9c2e8b1e1f55c09459144d84c045f0 (diff) | |
| parent | 5d07929808a6430d3d844db4da828dfadbc49cd2 (diff) | |
| download | kernel_samsung_smdk4412-52bb4a7391321b9f32c0b6e032d0a5e1796f1968.zip kernel_samsung_smdk4412-52bb4a7391321b9f32c0b6e032d0a5e1796f1968.tar.gz kernel_samsung_smdk4412-52bb4a7391321b9f32c0b6e032d0a5e1796f1968.tar.bz2 | |
Merge branch 'drm-nouveau-next' of git://git.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
* 'drm-nouveau-next' of git://git.freedesktop.org/git/nouveau/linux-2.6:
drm/nvc0/grctx: correct an off-by-one
drm/nv50: Fix race with PFIFO during PGRAPH context destruction.
drm/nouveau: Workaround incorrect DCB entry on a GeForce3 Ti 200.
drm/nvc0: implement irq handler for whatever's at 0x14xxxx
drm/nvc0: fix incorrect TPC register setup
drm/nouveau: probe for adt7473 before f75375
drm/nouveau: remove dead function definition
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bios.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bios.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 2aef5cd..49e5e99 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c @@ -6310,6 +6310,9 @@ void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) static bool apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct dcb_table *dcb = &dev_priv->vbios.dcb; + /* Dell Precision M6300 * DCB entry 2: 02025312 00000010 * DCB entry 3: 02026312 00000020 @@ -6327,6 +6330,18 @@ apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) return false; } + /* GeForce3 Ti 200 + * + * DCB reports an LVDS output that should be TMDS: + * DCB entry 1: f2005014 ffffffff + */ + if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { + if (*conn == 0xf2005014 && *conf == 0xffffffff) { + fabricate_dcb_output(dcb, OUTPUT_TMDS, 1, 1, 1); + return false; + } + } + return true; } |